Apparatus and method for electrolytically depositing a metal on a microelectronic workpiece

• US 6,197,181 B1
• Filed: 03/20/1998
• Issued: 03/06/2001
• Est. Priority Date: 03/20/1998
• Status: Expired due to Term

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Semitool Incorporated (Applied Materials Incorporated)
• Inventors: Chen, LinLin
• Primary Examiner(s): Gorgos, Kathryn
• Assistant Examiner(s): NICOLAS, WESLEY A
• Application Number:
  US09/045,245
• Time in Patent Office: 1,082 Days
• Field of Search: 205/295, 205/183, 205/184, 205/186, 205/123, 204/198
• US Class Current: 205/123
• CPC Class Codes: H01L 21/2885 using an external electrical current, i.e. electro-deposition
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76868 Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 2221/1089 Stacks of seed layers
• CPC Class Codes: H05K 3/423 characterised by electroplating method

Abstract

A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer having a thickness of less than or equal to about 500 Angstroms. The ultra-thin seed layer is then enhanced by depositing additional metal thereon to provide an enhanced seed layer. The enhanced seed layer has a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece.

Claims

1. A process for applying a metal to a microelectronic workpiece, the microelectronic workpiece including an exteriorly disposed surface having a plurality of micro-recessed structures that are defined by sidewalls, the microelectronic workpiece further including a barrier layer deposited on at least a portion of the exteriorly disposed surface of the microelectronic workpiece and on at least substantial portions of the walls of the plurality of micro-recessed structures, the process comprising the steps of:

(a) forming an ultra-thin metal seed layer exterior to the barrier layer using a first deposition process, the seed layer having a thickness of less than or equal to about 500 Angstroms;

(b) repairing the ultra-thin seed layer by depositing an additional metal using a second deposition process that is different from the first deposition process to provide a repaired seed layer that is suitable for subsequent electroplating, the repaired seed layer having a thickness at all points on sidewalls of substantially all micro-recessed structures distributed within the workpiece that is equal to or greater than about 10% of the nominal thickness of the enhanced seed layer over the exteriorly disposed surface of the workpiece;

(c) electroplating a metal onto the repaired seed layer using a third deposition process using processing parameters that are different from processing parameters used in the second deposition process.

2. The process of claim 1 wherein the additional metal is copper.

3. The process of claim 1 wherein the ultra-thin seed layer is enhanced by a process comprising an electrochemical deposition step.

4. The process of claim 3 wherein the electrochemical deposition step occurs in an alkaline bath.

5. The process of claim 4 wherein the alkaline bath comprises metal ions and an agent effective in complexing the metal ions.

6. The process of claim 5 wherein the complexing agent is comprised of one or more complexing agents selected from EDTA, ED, and polycarboxylic acid.

7. The process of claim 5 wherein the complexing agent is comprised of EDTA and the EDTA in the bath has a concentration within the range of 0.03 to 1.0 M.

8. The process of claim 6 wherein the complexing agent is comprised of ED and wherein the ED in the electrolytic bath has a concentration within the range of 0.03 to 1.0 M.

9. The process of claim 6 wherein the complexing agent is comprised of citric acid and the citric acid in the bath has a concentration within the range of 0.03 to 1.0 M.

10. The process of claim 7 wherein the complexing agent is comprised of EDTA and the EDTA has a concentration within the range of 0.1 to 0.4 M.

11. The process of claim 4 wherein the third deposition process takes place in an acidic electrolytic solution to the metal to at least a thickness needed to substantially fill the micro-recessed structures.

12. The process of claim 11 and further comprising the step of subjecting the microelectronic workpiece to a rinsing process after electrochemical deposition in the alkaline bath and prior to the further electrochemical deposition process in an acidic electrolytic solution.

13. The process of claim 1 wherein the ultra-thin metal seed layer formed in step (a) is formed by physical vapor deposition.

14. The process of claim 1 wherein the ultra-thin metal seed layer formed in step (a) has a thickness of about 50 to about 500 Angstroms.

15. The process of claim 14 wherein the ultra-thin metal layer formed in step (a) has a thickness of about 100 to about 250 Angstroms.

16. In a manufacturing line including a plurality of apparatus for the manufacture of micro-sized metal structures on a microelectronic workpiece, one or more apparatus of the plurality of apparatus being used for applying metal to a surface of the microelectronic workpiece, the one or more apparatus comprising:

means for applying a conductive ultra-thin seed layer to a surface of the microelectronic workpiece using a first deposition process, the ultra-thin seed layer having a thickness of less than 500 Angstroms;

means for electrochemically repairing the conductive ultra-thin seed layer using a second deposition process that differs from the first deposition process to thereby provide repaired seed layer that is suitable for subsequent electroplating;

means for electroplating a metal onto the repaired seed layer to a predetermined thickness representing a bulk portion of the micro-sized metal structure.

17. One or more apparatus as claimed in claim 16 wherein the means for applying is further defined by means for applying a conductive ultra-thin copper seed layer to a barrier layer surface of the microelectronic workpiece.

18. One or more apparatus as claimed in claim 17 wherein the means for electrochemically enhancing the conductive ultra-thin seed layer is further defined by means for electrochemically enhancing the conductive ultra-thin seed layer by electrochemically depositing copper using an alkaline copper bath having a complexing agent.

19. One or more apparatus as claimed in claim 18 wherein the electrochemical enhancement of the ultra-thin seed layer takes place at a plating voltage having a magnitude that is at least about or greater than 1.1 volts.

20. One or more apparatus as claimed in claim 18, wherein the alkaline bath has a pH>

or equal to about 9.0.

21. One or more apparatus as claimed in claim 18 wherein the complexing agent is comprised of EDTA.

22. One or more apparatus as claimed in claim 18 wherein the complexing agent is comprised of ED.

23. One or more apparatus as claimed in claim 18 wherein the complexing agent is a comprised of a carboxylic acid or salt thereof.

24. One or more apparatus as claimed in claim 23 wherein the complexing agent is citric acid or salt thereof.

25. One or more apparatus as claimed in claim 18 wherein said means for electroplating comprises means for electroplating copper over the repaired seed layer by using an acidic copper bath.

26. One or more apparatus as claimed in claim 25 wherein the electrochemical enhancement of the ultra-thin seed layer takes place at a plating voltage having a magnitude that is greater than the magnitude of the plating voltage in the acidic copper bath.

27. One or more apparatus as claimed in claim 26 and further comprising means for rinsing the microelectronic workpiece prior to its introduction to the means for electrochemically adding a further layer of copper.

28. One or more apparatus as claimed in claim 16 wherein the means for applying is further defined by means for applying a conductive ultra-thin copper seed layer to a barrier layer surface of the microelectronic workpiece using a PVD process.

29. One or more apparatus as claimed in claim 16 wherein the means for applying is further defined by means for applying a conductive ultra-thin copper seed layer to a barrier layer surface of the microelectronic workpiece using a CVD process.

30. A process for applying a metal to a surface of a microelectronic workpiece pursuant to forming one or more micro-sized metal structures thereon, the microelectronic workpiece including a barrier layer deposited on at least a portion of the surface of the microelectronic workpiece, the process comprising the steps of:

(a) forming an ultra-thin metal seed layer on the barrier layer, the ultra-thin metal seed layer having a thickness of less than 500 Angstroms;

(b) subjecting the microelectronic workpiece to a first electrochemical copper deposition process in an alkaline electrolytic bath having copper ions complexed with a complexing agent such that additional copper is deposited on the ultra-thin metal seed layer to repair the seed layer so that is suitable for subsequent electrochemical deposition;

(c) subjecting the microelectronic workpiece to a second electrochemical copper deposition process using processing parameters that differ from processing parameters used in the first electrochemical copper deposition process.

31. The process of claim 30 wherein the ultra-thin metal seed layer formed in step (a) is formed by physical vapor deposition.

32. The process of claim 30 wherein the ultra-thin seed layer formed in step (a) has a thickness of about 50 to about 500 Angstroms.

33. The process of claim 32 wherein the ultra-thin seed layer formed in step (a) has a thickness of about 100 to about 250 Angstroms.

34. The process of claim 33 wherein the ultra-thin seed layer formed in step (a) has a thickness of about 200 Angstroms.

35. The process of claim 30 wherein the alkaline electrolytic bath has a pH of at least 9.0.

36. The process of claim 30 wherein the copper ions in the electrolytic bath are provided by copper sulfate.

37. The process of claim 36 wherein the copper sulfate in the electrolytic bath has a concentration within the range of 0.03 to 0.25 M.

38. The process of claim 36 wherein the concentration of copper sulfate is about 0.1 M.

39. The process of claim 30 wherein the copper complexing agent is comprised of a copper complexing agent selected from EDTA, ED, and citric acid.

40. The process of claim 39 wherein the complexing agent is comprised of EDTA and the EDTA in the electrolytic bath has a concentration within the range of 0.03 to 1.0 M.

41. The process of claim 39 wherein the complexing agent is comprised of ED and the ED in the electrolytic bath has a concentration within the range of 0.03 to 1.0 M.

42. The process of claim 39 wherein the complexing agent is comprised of EDTA and the EDTA has a concentration within the range of 0.1 to 0.4 M.

43. The process of claim 30 wherein the complexing agent is comprised of citric acid.

44. The process of claim 43 wherein the citric acid has a concentration within the range of0.1 to 0.4 M.

45. The process of claim 30 wherein the second electrochemical copper deposition process takes place in an acidic electrolytic solution to complete deposition of the copper to a thickness needed for the formation of the micro-sized metal structure.

46. The process of claim 45 and further comprising the step of subjecting the microelectronic workpiece to a rinsing process after step (b) and prior to the second electrochemical copper deposition process in the acidic electrolytic solution.

47. A process for applying a metal to a microelectronic workpiece pursuant to forming a micro-sized metal structure on a surface of the microelectronic workpiece, the process comprising:

(a) forming a metal seed layer on a surface of the workpiece using a first deposition process, the metal seed layer being generally unsuitable for bulk deposition of a metal that is to be used to form the micro-sized metal structure;

(b) repairing the seed layer by depositing additional metal on the seed layer using a second deposition process that differs from the first deposition process to thereby provide a repaired seed layer that is suitable for subsequent bulk deposition of a metal that is to be used to form the micro-sized metal structure;

(c) subjecting the microelectronic workpiece to a third deposition process using processing parameters that differ from processing parameters used in the second deposition process to deposit a bulk amount of the metal that is used to form the micro-sized metal structure.

48. The process of claim 47 wherein the metal layer formed in step (a) has a thickness of about 100 to about 250 Angstroms.

49. The process of claim 48 wherein the metal seed layer of step (a) is formed in a physical vapor deposition process.

50. The process of claim 48 wherein the metal seed layer of step (a) is formed in a chemical vapor deposition process.

51. The process of claim 48 wherein the seed layer is enhanced in step (b) by electrochemically depositing the additional metal.

52. The process of claim 51 wherein the microelectronic workpiece comprises a barrier layer on which the seed layer is formed and wherein the additional metal is electrolytically deposited using an alkaline electrolytic plating solution that includes a complexing agent.

53. The process of claim 52 wherein the deposition of step (c) takes place in an acidic electrolytic plating solution.

54. The process of claim 53 and further comprising the step of rinsing the microelectronic workpiece after electrolytically repairing the seed layer in the alkaline electrolytic plating solution and prior to subjecting the microelectronic workpiece to the acidic electrolytic plating solution.

55. The process of claim 47 wherein the metal seed layer of step (a) is formed in a physical vapor deposition process.

56. The process of claim 47 wherein the metal seed layer of step (a) is formed in a chemical vapor deposition process.

57. The process of claim 56 wherein the microelectronic workpiece comprises a barrier layer on which the seed layer is formed and wherein the additional metal layer is electrolytically deposited using an alkaline electrolytic plating solution that includes a complexing agent.

58. The process of claim 47 wherein the seed layer is enhanced in step (b) by electrochemically depositing the additional metal layer.

59. The process of claim 58 wherein the third deposition process of step (c) comprises the step of electrolytically depositing the bulk amount of the metal on the surface of the repaired seed layer in an acidic electrolytic plating solution.

60. The process of claim 59 and further comprising the step of rinsing the microelectronic workpiece after electrolytically repairing the seed layer in the alkaline electrolytic plating solution and prior to subjecting the microelectronic workpiece to the acidic electrolytic plating solution.

61. In a manufacturing line including a plurality of apparatus for the manufacture of microelectronic circuits or components, one or more apparatus of the plurality of apparatus being used for applying interconnect metallization in a damascene process to a surface of a microelectronic workpiece used to form the microelectronic circuits or components, the one or more apparatus comprising:

means for applying a metal seed layer to a surface of the microelectronic workpiece using a physical vapor deposition process, the metal seed layer being generally unsuitable for bulk electrochemical deposition of the interconnect metallization;

means for electrochemically repairing the metal seed layer to render it suitable for subsequent electrochemical application of a metal to a predetermined thickness representing a bulk portion of the interconnect metallization.

62. A process for applying a metal to a microelectronic workpiece, the process comprising the steps of:

(a) forming a metal seed layer using a first deposition process, the first deposition process physically anchoring the metal seed layer to an underlying layer, the metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal thereon;

(b) repairing the seed layer by electrochemically depositing an additional metal on the seed layer using a second deposition process that is different from the first deposition process to form a repaired seed layer;

(c) electrolytically depositing a metal on the repaired seed layer under conditions in which the deposition rate of the electrolytic deposition process is substantially greater than the deposition rate of the process used to repair the seed layer.

63. A process for filling a micro-recessed structure disposed in a surface of a microelectronic workpiece with a metal, the microelectronic workpiece including a barrier layer deposited on at least a portion of the upper surface thereof and on surfaces of the plurality of micro-recessed structures, the process comprising the steps of:

(a) forming a metal seed layer on the barrier layer using a physical vapor deposition process, the metal seed layer having physical characteristics that render it generally unsuitable for bulk, electrolytic deposition of a metal thereon;

(b) repairing the seed layer by electrolytically depositing additional metal on the ultra-thin metal seed layer using an alkaline electroplating solution to thereby form a repaired seed layer;

(c) substantially filling the micro-recessed structures with a metal in an electrolytic deposition process using an acidic electroplating solution.

64. A process for applying a metal to a microelectronic workpiece, the microelectronic workpiece including a surface in which are disposed a plurality of micro-recessed structures, the process comprising the steps of:

(a) forming an ultra-thin metal seed layer on the surface of the microelectronic workpiece, including the walls of the plurality of micro-recessed structures, the ultra-thin metal seed layer being formed using a first deposition process;

(b) enhancing the ultra-thin seed layer by depositing an additional metal using a second deposition process that is different from the first deposition process to provide an enhanced seed layer, the additional metal being formed from a metal comprising the same metal used to form the ultra-thin seed layer; and

(c) electroplating a metal onto the enhanced seed layer so as to fill the micro-recessed structures.