CMOS imager with light shield

• US 6,198,087 B1
• Filed: 05/03/1999
• Issued: 03/06/2001
• Est. Priority Date: 05/03/1999
• Status: Expired due to Term

• Current Assignee: Iteris Incorporated
• Original Assignee: Iteris Incorporated
• Inventors: Boon, Cathy L.
• Primary Examiner(s): Allen, Stephone B.
• Application Number:
  US09/304,218
• Time in Patent Office: 673 Days
• Field of Search: 250/208.1, 250/214.R, 250/214.1, 358/474, 358/482, 358/483, 358/493-497, 348/294, 348/297, 348/298, 348/302-304, 257/291, 257/292, 257/443, 257/444
• US Class Current: 250/208.1
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof

Abstract

Improved imaging system includes a CMOS imaging chip with a light blocking layer configured so as to block incident light from a portion of the readout circuitry sensitive to light. The light blocking layer may be positioned on top of a glass package housing the imaging chip or may be incorporated in the manufacture of the chip itself. Distortions in image data due to lighting conditions in outdoor applications are avoided by the presence of the light blocking layer resulting in improved image quality under such conditions.

Claims

1. An imager sensor, comprising:

an array of light sensing elements corresponding to a plurality of image pixels;

a read out circuit configured adjacent the array of sensing elements, at least a portion of the read out circuit including light sensitive circuitry; and

a light blocking layer configured over at least the light sensitive portion of the read out circuit but not over the array of sensing elements.

2. An imager sensor as set out in claim 1, wherein said light blocking layer is adjacent to one edge of said array of sensing elements.

3. An imager sensor as set out in claim 1, wherein said read out circuitry includes CMOS devices.

4. An imager sensor as set out in claim 1, wherein said light sensitive portion of the read out circuit comprises read out signal amplification circuitry.

5. An imager sensor as set out in claim 3, wherein said light sensing elements comprise CMOS sensing elements.

6. An imager sensor as set out in claim 1, wherein said array of sensing elements and said read out circuit are configured in an integrated circuit.

7. An imager sensor as set out in claim 6, wherein said image sensor further comprises a package, including a base and a transparent cover, wherein said integrated circuit is mounted in said base and wherein said light blocking layer is configured on said transparent cover.

8. An imager sensor as set out in claim 1, wherein said light blocking layer is spaced apart from said array of sensing elements by a distance of about 0.006 inch or less.

9. An image sensor as set out in claim 7, wherein said light blocking layer is adhesively bonded to said transparent cover.

10. An imaging system comprising:

an optical system for focusing incident light;

an image sensor configured to receive the focused incident light, including;

an array of light sensing elements corresponding to a plurality of image pixels;

a read out circuit configured adjacent the array of sensing elements, at least a portion of the read out circuit including light sensitive circuitry; and

a light blocking layer configured over at least the light sensitive portion of the read out circuit; and

an image processor for processing the image data provided from said image sensor.

11. An imaging system as set out in claim 10, wherein said light blocking layer does not cover any portion of said array of sensing elements.

12. An imaging system as set out in claim 10, wherein said readout circuitry includes CMOS devices.

13. An imaging system as set out in claim 10, wherein said light sensitive portion of the read out circuit comprises read out signal amplification circuitry.

14. An imaging system as set out in claim 10, wherein said light sensing elements comprise CMOS sensing elements.

15. An imaging system as set out in claim 10, wherein said array of light sensing elements and said read out circuit are configured in an integrated circuit.

16. An imaging system as set out in claim 10, wherein said image sensor further comprises a package including a base and a transparent cover, and wherein said integrated circuit is mounted in said base and wherein said light blocking layer is configured on said transparent cover.

17. An imaging system as set out in claim 10, wherein said light blocking layer is spaced apart from said array of sensing elements by a distance of about 0.006 inch or less.

18. An imaging system as set out in claim 10, wherein said light blocking layer is adhesively mounted to said transparent cover.

19. A method for preventing image distortion in the image output of a CMOS image sensor having light sensitive read out circuitry, comprising:

providing a CMOS image sensor in an integrated circuit, said image sensor including an array of light sensing elements and a CMOS read out circuit including light sensitive circuitry; and

providing a light blocking layer over said light sensitive circuitry but not over said array of light sensing elements.

20. A method as set out in claim 19, wherein said step of providing a light blocking layer comprises positioning said layer within about 0.006 inches from said array of light sensing elements.