Phase locked loop having direct digital synthesizer dividers and improved phase detector

• US 6,198,353 B1
• Filed: 08/05/1999
• Issued: 03/06/2001
• Est. Priority Date: 08/05/1999
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Janesch, Stephen T., Stevenson, Carl R.
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US09/368,493
• Time in Patent Office: 579 Days
• Field of Search: 331/18, 331/25, 331/17, 331/16
• US Class Current: 331/16
• CPC Class Codes: H03L 7/085 concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00
• CPC Class Codes: H03L 7/1806 the frequency divider comprising a phase accumulator generating the frequency divided signal

Abstract

A digital phase locked loop (PLL) frequency synthesizer having the conventional voltage controlled oscillator (VCO) divider in the feedback loop to the phase detector replaced with a direct digital synthesizer (DDS) divider. In accordance with the principles of the present invention, the reference divider in the input path may also be replaced with a DDS divider. Moreover, a new architecture for the phase detector and current digital-to-analog converter (DAC) which operate on the instantaneous phase of each DDS is provided. Thus, in accordance with the principles of the present invention, the update rate of the digital PLL frequency synthesizer is not based on the frequency signal output from the reference divider in the input path (as in conventional digital PLL frequency synthesizer architectures). Rather, the update rate is based on fixed clock signals output from the clock generator, which utilizes the master clock and the output frequency, in accordance with the principles of the present invention. The digital PLL frequency synthesizer is capable of a very high update rate, very fast settling time, and very fine frequency control.

Claims

1. A digital phase locked loop frequency synthesizer, comprising:

a phase detector receiving at a first input a representation of a master frequency signal;

a digital-to-analog converter receiving an output of said phase detector;

a voltage controlled oscillator receiving an output of said digital-to-analog converter; and

a VCO direct digital synthesizer in a feedback loop between an output of said voltage controlled oscillator and a second input to said phase detector, said VCO direct digital synthesizer forming a first frequency divider.

2. The digital phase locked loop frequency synthesizer according to claim 1, further comprising:

a reference direct digital synthesizer between said master frequency signal and said first input of said phase detector, said reference direct digital synthesizer forming a second frequency divider.

3. The digital phase locked loop frequency synthesizer according to claim 2, further comprising:

a loop filter between said phase detector and said voltage controlled oscillator.

4. The digital phase locked loop frequency synthesizer according to claim 2, further comprising:

a pre-scaler in said feedback loop between said output of said voltage controlled oscillator and an input to said VCO direct digital synthesizer frequency divider.

5. The digital phase locked loop frequency synthesizer according to claim 3, further comprising:

a pre-scaler in said feedback loop between said output of said voltage controlled oscillator and an input to said VCO direct digital synthesizer frequency divider.

6. The digital phase locked loop frequency synthesizer according to claim 1, further comprising:

a loop filter between said phase detector and said voltage controlled oscillator.

7. The digital phase locked loop frequency synthesizer according to claim 1, further comprising:

a charge pump between an output of said phase detector and an input to said voltage controlled oscillator.

8. The digital phase locked loop frequency synthesizer according to claim 1, wherein:

said VCO direct digital synthesizer outputs words having at least two bits.

9. The digital phase locked loop frequency synthesizer according to claim 2, wherein:

said reference direct digital synthesizer outputs words having at least two bits.

10. A method of providing feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop, comprising:

dividing said output signal from said voltage controlled oscillator with a VCO direct digital synthesizer having at least two-bit word length output samples; and

providing said divided output signal to said input of said phase detector.

11. The method of providing feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 10, further comprising:

dividing a master reference frequency signal with a reference direct digital synthesizer; and

providing said divided master frequency signal to another input of said phase detector.

12. The method of providing feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 11, further comprising:

comparing a phase of said divided feedback signal output from said VCO direct digital synthesizer to a phase of a divided representation of a master input frequency signal output from said reference direct digital synthesizer to determine a difference therebetween.

13. The method of providing feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 12, further comprising:

changing a frequency of said output signal from said voltage controlled oscillator in accordance with said determined difference.

14. The method of providing feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 10, further comprising:

pre-scaling said output signal from said voltage controlled oscillator before said step of dividing said output signal from said voltage controlled oscillator with said VCO direct digital synthesizer.

15. Apparatus for providing feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop, comprising:

means for dividing said output signal from said voltage controlled oscillator with a VCO direct digital synthesizer having at least two-bit word length output samples; and

means for providing said divided output signal to said input of said phase detector.

16. The apparatus for providing feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 15, further comprising:

means for dividing a master reference frequency signal with a reference direct digital synthesizer; and

means for providing said divided master frequency signal to another input of said phase detector.

17. The apparatus to provide feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 16, further comprising:

means for comparing a phase of said divided feedback signal output from said VCO direct digital synthesizer to a phase of a divided representation of a master input frequency signal output from said reference direct digital synthesizer to determine a difference therebetween.

18. The apparatus to provide feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 17, further comprising:

means for changing a frequency of said output signal from said voltage controlled oscillator in accordance with said determined difference.

19. The apparatus to provide feedback between an output signal of a voltage controlled oscillator and an input signal to a phase detector in a digital phase locked loop according to claim 15, further comprising:

means for pre-scaling said output signal from said voltage controlled oscillator before said step of dividing said output signal from said voltage controlled oscillator with said VCO direct digital synthesizer.

20. A digital phase locked loop frequency synthesizer, comprising:

a master oscillator,

a reference direct digital synthesizer adapted to accept as input an output of said master oscillator;

a phase detector receiving at a first input a representation of a master frequency signal;

a digital-to-analog converter receiving an output of said phase detector;

a voltage controlled oscillator receiving an output of said digital-to-analog converter; and

a VCO direct digital synthesizer in a feedback loop between an output of said voltage controlled oscillator and a second input to said phase detector, said VCO direct digital synthesizer forming a first frequency divider.