Circular product term allocations scheme for a programmable device

• US 6,201,407 B1
• Filed: 10/07/1997
• Issued: 03/13/2001
• Est. Priority Date: 10/07/1997
• Status: Expired due to Term

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Kapusta, Richard L., Marshall, Jeffery Mark, Mohammed, Haneef D.
• Primary Examiner(s): WAMSLEY, PATRICK G
• Application Number:
  US08/946,030
• Time in Patent Office: 1,253 Days
• Field of Search: 326/39, 326/40, 326/41, 326/38, 365/185.17, 395/800.01, 716/12, 716/17
• US Class Current: 326/39
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A circular product term allocator configured to provide connections for product term signals to macrocells of a programmable logic device is provided. The circular product term allocator may provide such connections through a logic OR function. Alternatively, a homogeneous product term allocator may be configured to provide connections for product term signals to macrocells of a programmable logic device. The homogeneous product term allocator may be configured to provide each of the product term signals to an equal number of macrocells. In yet another embodiment, a programmable logic device includes a plurality of macrocells and a product term allocator configured to provide an equal number of product term signals to each of the macrocells. In yet a further embodiment, a method of distributing product terms in a programmable logic device is accomplished by configuring a product term allocator to provide an equal number of product terms, but fewer than all of the product terms, to each of the macrocells.

Claims

1. A circular product term allocator configured to provide connections for product term signals to macrocells of a programmable logic device such that every product term is provided to an equal number of macrocells from the output of the circular product term allocator and low order product terms wrap around to be provided to high order macrocells.

2. A programmable logic device comprising the circular product term allocator of claim 1.

3. The programmable logic device of claim 2 wherein said circular product term allocator is further configured to be homogeneous.

4. The programmable logic device of claim 3 further comprising a product term array coupled to said product term allocator.

5. The programmable logic device of claim 4 wherein said product term array is configured to provide a plurality of logic AND functions.

6. The programmable logic device of claim 5 wherein said product term array and said product term allocator are included within a logic block of said programmable logic device.

7. The programmable logic device of claim 6 wherein said logic block further includes a plurality of macrocells coupled to said product term allocator.

8. A circular product term allocator as in claim 1 wherein a plurality of said connections comprise logic OR functions.

9. A programmable logic device, comprising:

a plurality of macrocells; and

a circular product term allocator configured to provide an equal number of product term signals to each of the macrocells, such that an equal shift when allocating product terms amongst macrocells is provided so that every product term is provided to an equal number of macrocells from the output of the product term allocator, said equal number being fewer than all of said product terms, and low order product terms wrap around to be provided to high order macrocells.

10. A programmable logic device as in claim 9 wherein the circular product term allocator is further configured to be homogenous.

11. A programmable logic device as in claim 10 further comprising a product term array coupled to said circular product term allocator.

12. A programmable logic device as in claim 11 wherein the product term array is configured to provide a plurality of logic AND functions.

13. A programmable logic device as in claim 9 further comprising a product term array coupled to said circular product term allocator.

14. A programmable logic device as in claim 13 wherein the product term array is configured to provide a plurality of logic AND functions.

15. A programmable logic device as in claim 9 wherein the circular product term allocator is further configured to provide logic OR functions to couple the product term signals to the macrocells.