Concurrent hardware-software co-simulation

• US 6,202,044 B1
• Filed: 06/12/1998
• Issued: 03/13/2001
• Est. Priority Date: 06/13/1997
• Status: Expired due to Fees

• Current Assignee: Simpod, Inc.
• Original Assignee: Simpod, Inc.
• Inventors: Tzori, Yiftach
• Primary Examiner(s): Stamber, Eric W.
• Assistant Examiner(s): Sergent, Douglas W.
• Application Number:
  US09/096,672
• Time in Patent Office: 1,005 Days
• Field of Search: 395/500.44, 395/500.45, 395/500.46, 395/500.47, 395/500.48, 395/500.49, 714/25, 714/28, 714/29, 703/28, 703/24, 703/23, 703/14
• US Class Current: 703/28
• CPC Class Codes: G06F 11/261 by simulating additional hardware, e.g. fault simulation
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

A digital logic simulation/emulation system (20) operates in an engaged operating mode in which a digital-logic simulation process (22) transmits stimulation-control data to a hardware pod (32) for controlling stimulation of a digital logic circuit. In response to the stimulation-control data, the hardware pod (32) performs a stimulation-response cycle, and then sends response data from the digital logic circuit to the simulation process (22). The simulation process (22) and the hardware pod (32) may also operate in a disengaged operating mode in which each operates independently of the other without exchanging stimulation-control data or response data. Operation of the system (20) in the disengaged mode commences if a disengagement event occurs in the hardware pod (32). Operation of the system (20) in the disengaged mode terminates if the simulation process (22) sends stimulation-control data to the hardware pod (32), or if the hardware pod (32) sends response data to the simulation process (22).

Claims

1. A digital logic simulation/emulation system comprising:

a computer program digital-logic simulation process executed by a digital computer for modeling a hardware system that includes digital logic; and

a hardware pod that;

is adapted for being coupled to a digital logic circuit;

includes a plurality of stimulus/response cells for providing stimulus signals to the digital logic circuit during a stimulation-response cycle, and for receiving responses from the digital logic circuit during the stimulation-response cycle; and

further includes a communication port for receiving stimulation-control data from said digital-logic simulation process to be transmitted to the stimulus/response cells for controlling stimulation of the digital logic circuit during the stimulation-response cycle, and for receiving response data generated by the digital logic circuit in response to stimulation thereof during the stimulation-response cycle for transmission from said hardware pod to said digital-logic simulation process;

 

said digital-logic simulation process and said hardware pod being coupled together in the simulation/emulation system for exchanging stimulation-control data and response data;

said digital-logic simulation process and said hardware pod being operable in an engaged operating mode in which said digital-logic simulation process first transmits stimulation-control data to said hardware pod for controlling stimulation of the digital logic circuit by the stimulus/response cells during a single stimulation-response cycle, and then receives from said hardware pod response data that reports the response of the digital logic circuit to stimulation during that stimulation-response cycle; and

said digital-logic simulation process and said hardware pod also being operable in a disengaged operating mode which commences in response to a disengagement event occurring in said hardware pod while said hardware pod and said digital-logic simulation process are operating in the engaged operating mode, upon occurrence of the disengagement event said hardware pod transmitting a disengagement message to said digital-logic simulation process indicating to said digital-logic simulation process that said hardware pod is entering the disengaged operating mode and is commencing execution of stimulation-response cycles without receiving additional stimulation-control data from said digital-logic simulation process, and said digital-logic simulation process upon receiving the disengagement message from the hardware pod commencing operation in the disengaged operating mode in which said digital-logic simulation process continues execution without receiving response data from said hardware pod; and

while said hardware pod and said digital-logic simulation process operate in the disengaged operating mode;

said hardware pod;

when an engagement event occurs within the hardware pod that requires communication with said digital-logic simulation process, both transmits an engagement message to said digital-logic simulation process, and enters the engaged operating mode; and

enters the engaged operating mode upon receiving an engagement message from said digital-logic simulation process; and

said digital-logic simulation process;

when an engagement event occurs within the digital-logic simulation process that requires communication with said hardware pod, both transmits an engagement message to said hardware pod, and enters the engaged operating mode; and

enters the engaged operating mode upon receiving an engagement message from said hardware pod.

2. The simulation/emulation system of claim 1 wherein the engagement event occurring in said hardware pod is a requirement that said hardware pod transmit response data to said digital-logic simulation process.

3. The simulation/emulation system of claim 2 wherein said hardware pod detects occurrence of the engagement event occurring in the hardware pod within a single stimulation-response cycle of the digital logic circuit.

4. The simulation/emulation system of claim 1 wherein the engagement message sent from said hardware pod to said digital-logic simulation process is response data.

5. The simulation/emulation system of claim 1 wherein said hardware pod detects occurrence of the engagement event occurring in the hardware pod within a single stimulation-response cycle of the digital logic circuit.

6. The simulation/emulation system of claim 1 wherein the engagement event occurring in said digital-logic simulation process is a requirement that said digital-logic simulation process first transmit stimulation-control data to said hardware pod, and then wait for receipt from said hardware pod of response data generated by the digital logic circuit in response to stimulation by that stimulation-control data.

7. The simulation/emulation system of claim 1 wherein the engagement message sent from said digital-logic simulation process to said hardware pod is stimulation-control data.

8. A digital logic simulation/emulation system comprising:

a computer program digital-logic simulation process executed by a digital computer for modeling a hardware system that includes digital logic; and

a hardware pod that;

is adapted for being coupled to a digital logic circuit;

includes a plurality of stimulus/response cells for providing stimulus signals to the digital logic circuit during a stimulation-response cycle, and for receiving responses from the digital logic circuit during the stimulation-response cycle; and

further includes a communication port for receiving stimulation-control data from said digital-logic simulation process to be transmitted to the stimulus/response cells for controlling stimulation of the digital logic circuit during the stimulation-response cycle, and for receiving response data generated by the digital logic circuit in response to stimulation thereof during the stimulation-response cycle for transmission from said hardware pod to said digital-logic simulation process;

 

said digital-logic simulation process and said hardware pod being coupled together in the simulation/emulation system for exchanging stimulation-control data and response data;

said digital-logic simulation process and said hardware pod being operable in an engaged operating mode in which said digital-logic simulation process first transmits stimulation-control data to said hardware pod for controlling stimulation of the digital logic circuit by the stimulus/response cells during a single stimulation-response cycle, and then receives from said hardware pod response data that reports the response of the digital logic circuit to stimulation during that stimulation-response cycle; and

said digital-logic simulation process and said hardware pod also being operable in a disengaged operating mode which commences in response to a disengagement event occurring in said hardware pod while said hardware pod and said digital-logic simulation process are operating in the engaged operating mode, upon occurrence of the disengagement event said hardware pod transmitting a disengagement message to said digital-logic simulation process indicating to said digital-logic simulation process that said hardware pod is entering the disengaged operating mode and is commencing execution of stimulation-response cycles without receiving additional stimulation-control data from said digital-logic simulation process, and said digital-logic simulation process upon receiving the disengagement message from the hardware pod commencing operation in the disengaged operating mode in which said digital-logic simulation process continues execution without receiving response data from said hardware pod; and

while said hardware pod and said digital-logic simulation process operate in the disengaged operating mode, said hardware pod, when an engagement event occurs within the hardware pod that requires communication with said digital-logic simulation process, transmits an engagement message to said digital-logic simulation process, and enters the engaged operating mode.

9. A digital logic simulation/emulation system comprising:

a computer program digital-logic simulation process executed by a digital computer for modeling a hardware system that includes digital logic; and

a hardware pod that;

is adapted for being coupled to a digital logic circuit;

includes a plurality of stimulus/response cells for providing stimulus signals to the digital logic circuit during a stimulation-response cycle, and for receiving responses from the digital logic circuit during the stimulation-response cycle; and

further includes a communication port for receiving stimulation-control data from said digital-logic simulation process to be transmitted to the stimulus/response cells for controlling stimulation of the digital logic circuit during the stimulation-response cycle, and for receiving response data generated by the digital logic circuit in response to stimulation thereof during the stimulation-response cycle for transmission from said hardware pod to said digital-logic simulation process;

 

said digital-logic simulation process and said hardware pod being coupled together in the simulation/emulation system for exchanging stimulation-control data and response data;

said digital-logic simulation process and said hardware pod being operable in an engaged operating mode in which said digital-logic simulation process first transmits stimulation-control data to said hardware pod for controlling stimulation of the digital logic circuit by the stimulus/response cells during a single stimulation-response cycle, and then receives from said hardware pod response data that reports the response of the digital logic circuit to stimulation during that stimulation-response cycle; and

said digital-logic simulation process and said hardware pod also being operable in a disengaged operating mode which commences in response to a disengagement event occurring in said hardware pod while said hardware pod and said digital-logic simulation process are operating in the engaged operating mode, upon occurrence of the disengagement event said hardware pod transmitting a disengagement message to said digital-logic simulation process indicating to said digital-logic simulation process that said hardware pod is entering the disengaged operating mode and is commencing execution of stimulation-response cycles without receiving additional stimulation-control data from said digital-logic simulation process, and said digital-logic simulation process upon receiving the disengagement message from the hardware pod commencing operation in the disengaged operating mode in which said digital-logic simulation process continues execution without receiving response data from said hardware pod; and

while said hardware pod and said digital-logic simulation process operate in the disengaged operating mode, said digital-logic simulation process, when an engagement event occurs within the digital-logic simulation process that requires communication with said hardware pod, transmits an engagement message to said hardware pod, and enters the engaged operating mode.