Methods and apparatus for updating a nonvolatile memory

• US 6,205,548 B1
• Filed: 07/31/1998
• Issued: 03/20/2001
• Est. Priority Date: 07/31/1998
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Hasbun, Robert N.
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): NGUYEN, NGUYEN X
• Application Number:
  US09/127,426
• Time in Patent Office: 963 Days
• Field of Search: 713/2, 713/100, 395/430, 455/419, 711/170, 711/200
• US Class Current: 713/2
• CPC Class Codes: G06F 12/023 Free address space management
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57
• CPC Class Codes: G06F 9/4403 Processor initialisation

Abstract

Code is written to a selected portion of a nonvolatile memory having a first portion associated with a first range of addresses and a second portion associated with a second range of addresses, wherein the selected portion is the second portion. Toggling a block selector swaps addresses of the first and second portions, wherein the first range of addresses reference the second portion of nonvolatile memory and the second range of addresses reference the first portion of nonvolatile memory. An apparatus includes a processor that initiates a boot sequence at a pre-determined address. An address decoder accesses a one of a first and a second block of nonvolatile memory in response to the pre-determined address in accordance with a value of the block selector. A method using a group selector includes the step of receiving an address from a processor. The address is decoded to access one of a first and a second group of blocks of nonvolatile memory in accordance with a value of the group selector. An apparatus includes an address decoder coupled to the group selector and a nonvolatile memory having a plurality of blocks. The address decoder associates a first range of addresses with a first group and a second range of addresses with the second group if the group selector has a first value. The address decoder associates the first range of with the second group and the second range with the first group if the group selector has a second value.

Claims

1. A method for providing data to a memory, the method comprising:

writing data to a selected portion of a nonvolatile memory, the nonvolatile memory having a first portion associated with a first range of addresses and a second portion associated with a second range of addresses, and wherein the selected portion is the second portion; and

toggling values of a block selector to swap addresses of the first and second portions if the block selector is unlocked, wherein the first range of addresses reference the second portion of nonvolatile memory and the second range of addresses reference the first portion of nonvolatile memory.

2. The method of claim 1, further comprising:

booting a processor using boot data stored at a pre-determined location within the nonvolatile memory, wherein the pre-determined location references the first portion in accordance with the block selector.

3. The method of claim 2, further comprising:

rebooting the processor, wherein the pre-determined location references the second portion in accordance with the block selector.

4. The method of claim 1, wherein the nonvolatile memory is a flash electrically erasable programmable read only memory.

5. The method of claim 1, wherein each of the first and second portions comprises a block of the nonvolatile memory.

6. The method of claim 1, further comprising:

locking the block selector.

7. An apparatus for accessing a memory comprising:

a processor to initiate a boot sequence at a pre-determined address;

a block selector having a lock status or an unlock status;

a nonvolatile memory having a first and second block; and

an address decoder to access the first block in response to the pre-determined address if the block selector has a first value and is in an unlock status, and wherein the address decoder is to access the second block in response to the pre-determined address if the block selector has a second value and is in an unlock status.

8. The apparatus of claim 7, wherein at least one of the first and second blocks stores boot data.

9. The apparatus of claim 7, wherein at least one of the first and second blocks is locked to prevent modification.

10. The apparatus of claim 7, wherein the block selector is lockable to prevent subsequent modification of a block selector value.

11. A method for accessing a memory, the method comprising:

receiving an address from a processor;

decoding the address in accordance with a first value of a group selector to access a first group of at least one block of nonvolatile memory associated with a first range of addresses if the group selector is unlocked, and wherein a second group of at least one block of nonvolatile memory is associated with a second range of addresses; and

toggling the group selector to a second value and if the group selector is unlocked, wherein the first range is associated with the second group and the second range is associated with the first group.

12. The method of claim 11, wherein one of the first and second groups includes a block storing boot data.

13. The method of claim 11, wherein the first and second groups each comprises a single block.

14. The method of claim 11, wherein the first and second groups each comprises a plurality of blocks.

15. The method of claim 11, wherein the first and second groups are contiguous groups of nonvolatile memory.

16. The method of claim 11, wherein the first and second groups are non-contiguous groups of nonvolatile memory.

17. An apparatus for accessing a memory comprising:

a nonvolatile memory having a plurality of blocks;

a group selector having a locked status and an unlocked status; and

an address decoder coupled to the group selector and the nonvolatile memory, wherein the address decoder is to associate a first range of addresses with a first group of at least one block of nonvolatile memory and a second range of addresses with a second group of at least one block of nonvolatile memory if the group selector has a first value and is in the unlocked status, and wherein the address decoder is to associate the first range with the second group and the second range with the first group if the group selector has a second value and is in the unlocked status.

18. The apparatus of claim 17, wherein at least one of the first and second groups includes a block storing boot data.

19. The apparatus of claim 17, wherein each of the first and second groups comprises a single block.

20. The apparatus of claim 17, wherein each of the first and second groups comprises a plurality of blocks.

21. The apparatus of claim 17, wherein the first and second groups are contiguous groups of nonvolatile memory.

22. The apparatus of claim 17, wherein the first and second groups are non-contiguous groups of nonvolatile memory.

23. The apparatus of claim 17, wherein at least one of the first and second groups of the nonvolatile memory is lockable to prevent modifications.