Tamper resistant methods and apparatus

• US 6,205,550 B1
• Filed: 09/05/1997
• Issued: 03/20/2001
• Est. Priority Date: 06/13/1996
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Shippy, Keith L., Mangold, Richard P., Graunke, Gary L., Maliszewski, Richard L., Aucsmith, David W., Pfotenhauer, Jody L., Nardone, Joseph M.
• Primary Examiner(s): Wright, Norman M.
• Application Number:
  US08/924,740
• Time in Patent Office: 1,292 Days
• Field of Search: 395/186, 380/3, 380/4, 380/23, 380/30, 713/200, 713/201, 713/187, 713/194
• US Class Current: 726/22
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 21/10 Protecting distributed programs or content, e.g. vending or licensing of copyrighted material protection in video systems or pay television H04N7/16 ; Digital rights management [DRM]
• CPC Class Codes: G06F 21/14 against software analysis or reverse engineering, e.g. by obfuscation
• CPC Class Codes: G06F 21/52 during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
• CPC Class Codes: G06F 21/57 Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06F 2221/2107 File encryption
• CPC Class Codes: G06F 2221/2135 Metering
• CPC Class Codes: G06F 2221/2151 Time stamp
• CPC Class Codes: G11B 20/00086 Circuits for prevention of unauthorised reproduction or copying, e.g. piracy indicating unauthorised use of record carriers in general G11B23/28; scrambling for television signal recording H04N5/913; network architectures or network protocols for network security H04L63/00; cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00

Abstract

In one apparatus, a number of obfuscated programming instructions are equipped to self-verify whether execution of the obfuscated programming instructions is being observed. In another apparatus, a number of obfuscated programming instruction are equipped to determine whether the apparatus is being operated in a mode that supports single step execution of the obfuscated programming instructions. In yet another apparatus, a number of obfuscated programming instruction are equipped to verify whether an amount of elapsed execution time has exceeded a threshold. In yet another apparatus, a first and a second group of obfuscated programming instruction are provided to implement a first and a second tamper resistant technique respectively, with the first and the second group of programming instructions sharing a storage location for a first and a second key value corresponding to the first and the second tamper resistant technique.

Claims

1. An apparatus comprising:

a storage medium having stored therein a plurality of obfuscated cells of programming instructions designed to self-verify whether execution of the plurality of obfuscated programming instructions is being observed, wherein the obfuscated cells are mutated through an inter-cell dependent mutation process; and

an execution unit coupled to the storage medium for executing the programming instructions.

2. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions include obfuscated cells of programming instructions designed to determine whether the apparatus is being operated in a mode that supports single step execution of the obfuscated cells of programming instructions.

3. The apparatus as set forth in claim 2, wherein the plurality of obfuscated cells of programming instructions include obfuscated cells of programming instructions designed to access a state variable of the apparatus to perform said single step execution support determination.

4. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions include obfuscated cells of programming instructions designed to verify whether an amount of elapsed execution time has exceeded a threshold.

5. The apparatus as set forth in claim 4, wherein the plurality of obfuscated cells of programming instructions further include obfuscated cells of programming instructions designed to calculate the amount of elapsed execution time based on a recorded timestamp.

6. The apparatus as set forth in claim 5, wherein the plurality of obfuscated cells of programming instructions further include obfuscated cells of programming instructions designed to retrieve a current value of a timer of the apparatus, and store the retrieved current value of the timer as the recorded timestamp.

7. The apparatus as set forth in claim 6, wherein the obfuscated cells of programming instructions designed to store the retrieved current value of the timer as the recorded timestamp/store the retrieved current value in a storage location shared with at least one other tamper resistant technique.

8. A method comprising:

a) executing a plurality of obfuscated cells of programming instructions, wherein the obfuscated cells are mutated through an inter-cell dependent mutation process;

b) self-verifying by the plurality of obfuscated cells of programming instructions that the execution is not being observed; and

c) terminating said execution of (a) if (b) verified that the execution is being observed.

9. The method of claim 8, wherein (b) comprises the plurality of obfuscated cells of programming instructions determining whether the obfuscated cells of programming instructions are being executed in a mode that supports single step execution.

10. The method of claim 9, wherein (b) comprises the plurality of obfuscated cells of programming instructions accessing a state variable to make said single step execution support determination.

11. The method of claim 8, wherein (b) comprises the plurality of obfuscated cells of programming instructions verifying whether an amount of elapsed execution time has exceeded a threshold.

12. The method of claim 11, wherein (b) further comprises calculating the amount of elapsed execution time based on a recorded timestamp.

13. The method of claim 12, wherein (b) further comprises retrieving a current value of a timer, and storing the retrieved current value of the timer as the recorded timestamp.

14. The method of claim 13, wherein (b) comprises storing the retrieved current value in a storage location shared with another tamper resistant technique.

15. An apparatus comprising:

a storage medium having stored therein a plurality of obfuscated cells of programming instructions designed to determine whether the apparatus is being operated in a mode that supports single step execution of the obfuscated cells of programming instructions, wherein the obfuscated cells are mutated through an intercell dependent mutation process; and

an execution unit coupled to the storage medium for executing the programming instructions.

16. The apparatus as set forth in claim 15, wherein the plurality of obfuscated cells of programming instructions include obfuscated cells of programming instructions designed to access a state variable of the apparatus to perform said single step execution support determination.

17. A method comprising:

a) executing a plurality of obfuscated cells of programming instructions, wherein the obfuscated cells are mutated through an inter-cell dependent mutation process;

b) determining whether the obfuscated cells of programming instructions are being executed in a mode that supports single step execution; and

c) terminating said execution of (a) if (b) verified that the execution is being executed in a mode that supports single step execution.

18. The method of claim 17, wherein (b) comprises the plurality of obfuscated cells of programming instructions accessing a state variable to make said single step execution support determination.

19. An apparatus comprising:

a storage medium having stored therein a plurality of obfuscated cells of programming instructions designed to verify whether an amount of elapsed execution time has exceeded a threshold, wherein the obfuscated cells are mutated through an inter-cell dependent mutation process; and

an execution unit coupled to the storage medium for executing the programming instructions.

20. The apparatus as set forth in claim 19, wherein the plurality of obfuscated cells of programming instructions further include obfuscated cells of programming instructions designed to calculate the amount of elapsed execution time based on a recorded timestamp.

21. The apparatus as set forth in claim 20, wherein the plurality of obfuscated cells of programming instructions further include obfuscated cells of programming instructions designed to retrieve a current value of a timer of the apparatus, and store the retrieved current value of the timer as the recorded timestamp.

22. The apparatus as set forth in claim 21, wherein the obfuscated cells of programming instructions designed to store the retrieved current value of the timer as the recorded timestamp, store the retrieved current value in a storage location shared with at least one other tamper resistant technique.

23. A method comprising:

a) executing a plurality of obfuscated cells of programming instructions, wherein the obfuscated cells are mutated through an inter-cell dependent mutation process;

b) verifying whether an amount of elapsed execution time has exceeded a threshold; and

c) terminating said execution of (a) if (b) verified that the execution is being observed.

24. The method of claim 23, wherein (b) further comprises calculating the amount of elapsed execution time based on a recorded timestamp.

25. The method of claim 24, wherein (b) further comprises retrieving a current value of a timer, and storing the retrieved current value of the timer as the recorded timestamp.

26. The method of claim 25, wherein (b) comprises storing the retrieved current value in a storage location shared with another tamper resistant technique.

27. An apparatus comprising:

a storage medium having stored therein a first and a second plurality of obfuscated cells of programming instructions designed to implement a first anti-observation tamper resistant technique and an observation detection tamper resistant technique respectively, with the first and the second plurality of obfuscated cells of programming instructions sharing a storage location for a first and a second key value corresponding to the first anti-observation and the observation detection tamper resistant techniques, wherein the obfuscated cells are mutated through an inter-cell dependent mutation process; and

an execution unit coupled to storage medium for executing the programming instructions.

28. The apparatus as set forth in claim 27, wherein the first plurality of obfuscated cells of programming instructions are designed to implement a key based secret retrieval technique, and the second plurality of obfuscated cells of programming instructions are designed to verify that an amount of elapsed execution time has not exceeded a threshold.

29. The apparatus as set forth in claim 27, wherein the storage medium further having stored therein a third plurality of obfuscated cells of programming instructions designed to implement a second anti-observation tamper resistant technique, with the third plurality of obfuscated cells of programming instructions also sharing the same storage location for a third key value corresponding to the second anti-observation tamper resistant technique.

30. The apparatus as set forth in claim 29, wherein the first plurality of obfuscated cells of programming instructions are designed to implement a key based secret retrieval technique, the second plurality of obfuscated cells of programming instructions are designed to verify that an amount of elapsed execution time has not exceeded a threshold, and the third plurality of obfuscated cells of programming instructions are designed to implement an authentication process.

31. A method comprising:

a) executing a first plurality of obfuscated cells of programming instructions to implement a first anti-observation tamper resistant technique, including storing a first key value corresponding to the first anti-observation tamper resistant technique in a shared storage location, wherein the obfuscated cells are mutated through an intercell dependent mutation process; and

b) executing a second plurality of obfuscated cells of programming instructions to implement an observation detection tamper resistant technique, including storing a second key value corresponding to the observation detection tamper resistant technique in the same shared storage location.

32. The method of claim 31, wherein the method further comprises (c) executing a third plurality of obfuscated cells of programming instructions to implement a second anti-observation tamper resistant technique, including storing a third key value corresponding to the second anti-observation tamper resistant technique in the same shared storage location.