Method and system for generating a programming bitstream including identification bits

• US 6,205,574 B1
• Filed: 07/28/1998
• Issued: 03/20/2001
• Est. Priority Date: 07/28/1998
• Status: Expired due to Term

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Dellinger, Eric F., Iwanczuk, Roman
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Kik, Phallaka
• Application Number:
  US09/124,464
• Time in Patent Office: 966 Days
• Field of Search: 716/1-21, 395/500-2-5, 326/38-39, 340/825-3-8
• US Class Current: 716/117
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A method and system for generating a programming bitstream for a programmable gate array. A programming bitstream for the programmable gate array is generated in response to an input design specification. The programming bitstream includes one or more unused segments, either interspersed through the bitstream or appended to the end of the bitstream, wherein an unused segment includes bits that are not used for programming the programmable gate array. One or more selected items of information are encoded to form binary representations of the items. The binary representations are inserted into one or more of the unused segments of the programming bitstream.

Claims

1. A method for generating a programming bitstream for a programmable gate array comprising:

generating a complete programming bitstream for the programmable gate array in response to an input design specification, the complete programming bitstream implementing on the programmable gate array a circuit that functions in accordance with the design specification and including a configuration control portion, configuration data, and one or more unused segments, wherein an unused segment includes bits that are not used for programming the programmable gate array;

encoding one or more items of information to form binary representations of the items; and

inserting the binary representations into one or more of the unused segments of the complete programming bitstream.

2. The method of claim 1, further comprising:

generating a map of the programming bitstream identifying the one or more unused segments; and

referencing the map for insertion of the binary representations into the one or more unused segments.

3. The method of claim 1, wherein the one or more items of information is a logic core identifier.

4. The method of claim 1, wherein the one or more items of information is a software tool identifier.

5. The method of claim 4, wherein the software tool identifier includes a version number.

6. The method of claim 1, wherein the one or more items of information is a timestamp.

7. The method of claim 1, wherein the one or more items of information references one or more design change operations performed on the design specification.

8. The method of claim 1, wherein the one or more items of information is an authenticity code.

9. The method of claim 1, wherein the one or more items of information includes one or more items selected from a group of a design name, a design revision level, and a name of an author.

10. The method of claim 1, further comprising:

encoding into binary representations item bit lengths of respective ones of the items of information;

encoding into binary representation a total number of the items of information; and

inserting the binary representations of the total number and bit lengths into one or more of the unused segments of the programming bitstream.

11. The method of claim 10, further comprising:

inserting into the unused segments respective format codes associated with the items of information, each format code indicative of an information type that characterizes an item of information.

12. The method of claim 1, wherein:

generating the programming bitstream includes inserting a core identifier into a net list responsive to a logic core specification in the design specification; and

the item is the core identifier.

13. The method of claim 12, wherein generating the programming bitstream includes saving the core identifier in a circuit database responsive to the core identifier in the net list.

14. A method for generating a programming bitstream for a programmable gate array and ascertaining identification information from the programming bitstream, comprising:

generating a complete programming bitstream for the programmable gate array in response to an input design specification, the complete programming bitstream implementing on the programmable gate array a circuit that functions in accordance with the design specification and including a configuration control portion, configuration data, and one or more unused segments, wherein an unused segment includes bits that are not used for programming the programmable gate array;

encoding one or more items of information to form binary representations of the items;

inserting the binary representations into one or more of the unused segments of the complete programming bitstream;

reading from the unused segments the binary representations;

decoding the binary representation into the one or more items of information.

15. A method for ascertaining identification information from a complete programming bitstream for a programmable gate array, the complete programming bitstream implementing on the programmable gate array a circuit that functions in accordance with a design specification and including a configuration control portion, configuration data, and one or more unused segments, wherein an unused segment includes bits that are not used for programming the programmable gate array and having encoded therein binary representations of one or more items of information, comprising:

reading from at least one of the unused segments of the complete programming bitstream binary representations of one or more items of information;

decoding the binary representations into the one or more items of information.

16. The method of claim 15, further comprising determining from a map of the programming bitstream locations of the one or more unused segments of the bitstream.

17. The method of claim 16, further comprising:

reading from one or more of the unused segments a total number of items of information encoded in the unused segments;

reading from one or more of the unused segments respective bit lengths of the items of information encoded in the bitstream;

reading a number of bits indicated by the bit lengths for the respective items of information encoded in the bitstream.

18. The method of claim 16, further comprising reading from unused segments of the programming bitstream format codes associated with selected ones of the items of information, each format code indicative of an information type that characterizes an item of information.

19. An apparatus for generating a programming bitstream for a programmable gate array, comprising:

means for generating a complete programming bitstream for the programmable gate array in response to an input design specification, the complete programming bitstream implementing on the programmable gate array a circuit that functions in accordance with the design specification and including a configuration control portion, configuration data, and one or more unused segments, wherein an unused segment includes bits that are not used for programming the programmable gate array;

means for encoding one or more selected items of information to form binary representations of the items; and

means for inserting the binary representations into one or more of the unused segments of the complete programming bitstream.

20. A system for generating a programming bitstream for a programmable gate array, comprising:

a bitstream generator configured and arranged to generate a complete programming bitstream responsive to an input design specification, the complete programming bitstream implementing on the programmable gate array a circuit that functions in accordance with the design specification and having a configuration control portion, configuration data, and one or more unused segments that are not used for programming the programmable gate array;

an information encoder coupled to the bitstream generator and configured and arranged to encode one or more selected items of information into respective binary representations and insert the binary representations into one or more of the unused segments of the complete programming bitstream.