Forming submicron integrated-circuit wiring from gold, silver, copper, and other metals

• US 6,211,049 B1
• Filed: 02/24/1999
• Issued: 04/03/2001
• Est. Priority Date: 09/10/1998
• Status: Expired due to Term

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Farrar, Paul A.
• Primary Examiner(s): Picardat, Kevin M.
• Assistant Examiner(s): COLLINS, DEVEN M
• Application Number:
  US09/256,123
• Time in Patent Office: 769 Days
• Field of Search: 438/597, 438/598, 438/595
• US Class Current: 438/597
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76874 for electroless plating
• CPC Class Codes: H01L 21/76879 by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating plating on semiconductors in general H01L21/288
• CPC Class Codes: H01L 23/53228 the principal metal being copper
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53242 the principal metal being a noble metal, e.g. gold
• CPC Class Codes: H01L 23/53252 Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A typical integrated circuit interconnects millions of microscopic transistors and resistors with aluminum wires buried in silicon-dioxide insulation. Yet, aluminum wires and silicon-dioxide insulation are a less attractive combination than gold, silver, or copper wires combined with polymer-based insulation, which promise both lower electrical resistance and capacitance and thus faster, more efficient circuits. Unfortunately, conventional etch-based techniques are ineffective with gold, silver, or copper, and conventional polymer formation promote reactions with metals that undermine the insulative properties of polymer-based insulations. Accordingly, the inventor devised methods which use a liftoff procedure to avoid etching problems and a non-acid-polymeric precursor and non-oxidizing cure procedure to preserve the insulative properties of the polymeric insulator. The resulting interconnective structures facilitate integrated circuits with better speed and efficiency.

Claims

1. A method of making one or more conductive structures for an integrated circuit, comprising:

depositing a conductive material through one or more submicron openings in a mask structure on a surface;

removing at least a portion of the mask structure; and

depositing a conductive material on the conductive material deposited through the one or more submicron openings after removing at least a portion of the mask structure.

2. The method of claim 1 wherein the one or more openings have one or more corresponding widths less than about 0.75 microns, less than about 0.5 microns, or less than about 0.25 microns.

3. The method of claim 1 wherein depositing a conductive material through the one or more submicron openings comprises depositing at least one of gold, silver, or copper, and depositing a conductive material on the material deposited through the one or more submicron openings comprises depositing at least one of gold, silver, or copper.

4. The method of claim 1 wherein depositing a conductive material on the material deposited through the one or more submicron openings comprises an electroless plating.

5. The method of claim 1 wherein removing at least a portion of the mask structure comprises a tape-assisted liftoff.

6. The method of claim 1 wherein depositing a conductive material through one or more submicron openings on a surface comprises depositing metal on a surface of a trench in a polymeric layer.

7. The method of claim 1 further comprising:

forming a polymeric layer form a non-acid precursor; and

forming the mask structure on the polymeric layer.

31. The method of claim 1:

wherein depositing a conductive material through one or more submicron openings in a mask structure on a surface comprises deposition the conductive material on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the conductive material on the surface of the mask structure.

8. A method of making one or more metal structures for an integrated circuit, comprising:

depositing a metal including at least one of gold, silver, and copper through one or more submicron openings in a mask structure on a surface;

removing at least a portion of the mask structure; and

depositing a metal including at least one of gold, silver, and copper on the metal deposited through the one or more submicron openings after removing at least a portion of the mask structure.

9. The method of claim 8 wherein the one or more openings have one or more corresponding widths less than about 0.75 microns, less than about 0.5 microns, or less than about 0.25 microns.

10. The method of claim 8 wherein depositing a metal on the metal deposited through the one or more submicron openings comprises an electroless plating.

11. The method of claim 8 wherein depositing metal through one or more submicron openings on a surface comprises depositing metal on a surface of a trench in a polymeric layer.

32. The method of claim 8:

wherein depositing the metal comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.

12. A method of making one or more metal structures for an integrated circuit, comprising:

depositing a metal including at least one of gold, silver, and copper through one or more submicron openings in a mask structure on a surface of a polymeric insulator, with one or more of the openings having one or more corresponding widths less than about 0.75 microns, less than about 0.5 microns, or less than about 0.25 microns;

removing at least a portion of the mask structure; and

using an electroless plating to deposit a metal including at least one of gold, silver, and copper on the metal deposited through the one or more submicron openings after removing at least a portion of the mask structure.

33. The method of claim 12:

wherein depositing the metal comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.

13. A method of making one or more metal structures for an integrated circuit, comprising:

depositing metal through one or more openings in a mask structure on a surface;

removing at least a portion of the mask structure; and

using electroless plating to deposit metal on at least a portion of the deposited metal after removing at least a portion of the mask structure.

14. The method of claim 13 wherein the one or more openings have one or more corresponding widths less than about 0.75 microns, less than about 0.5 microns, or less than about 0.25 microns.

15. The method of claim 13 wherein depositing a metal through the one or more submicron openings comprises depositing a metal including at least one of gold, silver, or copper, and depositing a metal on the metal deposited through the one or more submicron openings comprises depositing a metal including at least one of gold, silver, or copper.

16. The method of claim 13 wherein depositing metal through one or more submicron openings on a surface comprises depositing metal on a surface of a trench in a polymeric layer.

34. The method of claim 13:

wherein depositing the metal comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.

17. A method of making one or more metal structures for an integrated circuit, comprising:

forming a polymeric layer from a non-acid base;

forming a trench in the polymeric layer;

depositing a diffusion-barrier material through one or more openings in a mask structure into the trench;

depositing metal through one or more openings in the mask structure onto at least a portion of the deposited diffusion-barrier material;

removing at least a portion of the mask structure; and

using electroless plating to deposit metal on at least a portion of the deposited metal after removing at least a portion of the mask structure.

18. The method of claim 17 wherein the one or more openings have one or more corresponding widths less than about 0.75 microns, less than about 0.5 microns, or less than about 0.25 microns.

19. The method of claim 17 wherein depositing a metal through the one or more submicron openings comprises depositing at least one of gold, silver, or copper.

35. The method of claim 17:

wherein depositing the metal further comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.

20. A method of making one or more metal structures for an integrated circuit, the method comprising:

forming a non-acid-based polymeric layer;

curing the polymeric layer in a non-oxidizing atmosphere; and

forming a mask structure having a plurality of openings which expose portions of the polymeric layer;

forming one or more trenches in the polymeric insulator through openings in the mask structure, with portions of the mask structure overhanging at least a portion of each trench;

depositing a metal into the one or more trenches through the one or more openings in the mask structure;

removing at least a portion of the mask structure; and

using electroless plating to deposit at least one of gold, silver, and copper onto at least a portion of the deposited metal after removing at least a portion of the mask structure.

21. The method of claim 20 wherein the one or more trenches have one or more correspondings widths less than about 0.75 microns, less than about 0.5 microns, or less than about 0.25 microns.

22. The method of claim 20 wherein depositing metal through the one or more openings in the mask structure includes depositing metal on the mask structure and wherein removing at least a portion of the mask structure includes removing substantially all of the mask structure and metal deposited on the mask structure.

23. The method of claim 20 wherein depositing metal through the one or more openings in the mask structure includes depositing at least one of zirconium, tantalum, titanium, and hafnium.

36. The method of claim 20:

wherein depositing the metal comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.

24. A method of electrically connecting first and second components in an integrated-circuit assembly, the method comprising:

forming a non-acid-based polymeric layer over the first and second components;

curing the polymeric layer in a non-oxidizing atmosphere;

forming a mask on the polymeric layer, the mask having an opening less than one micron in width;

forming a trench in the polymeric layer through the opening in the mask, the trench having respective first and second regions overlying the first and second components;

depositing a metal into the trench through the opening in the mask;

removing at least a portion of the mask; and

depositing at least one of gold, silver, and copper onto at least a portion of the deposited metal after removing at least a portion of the mask.

25. The method of claim 24 wherein depositing at least one of gold, silver, and copper comprises electroless plating.

26. The method of claim 24 wherein removing at least a portion of the mask comprises a tape-assisted liftoff process.

37. The method of claim 24:

wherein depositing the metal comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.

27. A method of making one or more conductive structures for an integrated circuit, comprising:

depositing a conductive material through one or more submicron openings in a mask on a surface of a trench in a polymeric layer;

removing at least a portion of the mask; and

depositing a conductive material on the conductive material deposited through the one or more submicron openings after removing at least a portion of the mask.

38. The method of claim 27:

wherein depositing the metal comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.

28. A method of making one or more conductive structures for an integrated circuit, the method comprising:

forming and planarizing an insulative surface;

forming a mask having one or more openings on the insulative surface;

forming one or more trenches in the insulative surface through the one or more openings of the mask;

depositing a metal seed material or a diffusion barrier material through the one or more openings into the one or more trenches;

removing the mask; and

after removing the mask, depositing gold, silver, or copper on to the metal seed material or the diffusion barrier material.

39. The method of claim 28:

wherein depositing the metal seed material or diffusion barrier material comprises depositing the metal seed material or diffusion barrier material on a surface of the mask; and

wherein removing the mask comprises removing at least portion the metal deposited on the surface of the mask.

29. A method of making one or more conductive structures for an integrated circuit, the method comprising:

forming a planarized insulative surface using a chemical-mechanical procedure;

forming on the planarized insulative surface a mask which is less than one micron thick and which has one or more openings that are less than one micron wide; and

depositing a seed material on the mask and through the one or more openings on the planarized insulative surface;

removing the mask; and

after removing the mask, applying a conductive material to the seed material through a plating process.

30. The method of claim 29, wherein each of the one or more conductive structures includes at least a portion having a width less than one micron.

40. The method of claim 29:

wherein depositing the metal comprises depositing the metal on a surface of the mask structure; and

wherein removing at least a portion of the mask structure comprising removing at least portion the metal deposited on the surface of the mask structure.