High breakdown voltage semiconductor device including first and second semiconductor elements

• US 6,211,549 B1
• Filed: 09/15/1998
• Issued: 04/03/2001
• Est. Priority Date: 09/17/1997
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Funaki, Hideyuki, Nakagawa, Akio
• Primary Examiner(s): LOKE, STEVEN HO YIN
• Application Number:
  US09/153,295
• Time in Patent Office: 931 Days
• Field of Search: 257/341, 257/337, 257/500, 257/501, 257/502, 257/329, 257/330, 257/331, 257/333
• US Class Current: 257/329
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 29/7317 Bipolar thin film transistors
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

A semiconductor device includes a first semiconductor element and a second semiconductor element, wherein the first semiconductor element of trench structure and the control circuit including the second semiconductor element such as a TFT or a bipolar transistor can be easily integrated by making the device structure such that the source layer of the buried gate electrode of the first semiconductor element and part of the second semiconductor element, such as the emitter or collector region, can be simultaneously formed.

Claims

1. A high breakdown voltage semiconductor device comprising:

a first semiconductor element; and

a second semiconductor element, wherein

said first semiconductor element includes;

a base layer of a first conductivity type with high resistance having a first main surface and a second main surface;

a base layer of a second conductivity type formed on the first main surface of said base layer of the first conductivity type;

a source layer of the first conductivity type formed in a surface area of said base layer of the second conductivity type;

a drain layer of the second conductivity type formed on the second main surface of said base layer of the first conductivity type;

a gate electrode buried and formed in a trench which penetrates said source layer of the first conductivity type and said base layer of the second conductivity type with a first insulating film disposed therebetween;

a source electrode formed in contact with said source layer of the first conductivity type and said base layer of the second conductivity type; and

a drain electrode formed in contact with said drain layer; and

said second semiconductor element includes;

a base region of the second conductivity type insulatively formed on said base layer of the second conductivity type;

a gate layer formed on said base region of the second conductivity type with a second insulating film disposed therebetween; and

a source region and a drain region of the first conductivity type insulatively formed on the surface of said base layer of the second conductivity type to hold said base region of the second conductivity type therebetween,

wherein said source layer of the first conductivity type has a same thickness as said source region of the first conductivity type, said drain region of the first conductivity type, and said base region of the second conductivity type, and

said gate electrode includes a portion having a same impurity concentration as said gate layer.

2. A high breakdown voltage semiconductor device according to claim 1, further comprising a buffer layer of the first conductivity type formed between said base layer of the first conductivity type and said drain layer.

3. A high breakdown voltage semiconductor device according to claim 1, wherein said gate electrode includes a first gate electrode formed in and along the trench with said first insulating film disposed therebetween and a second gate electrode formed on said first gate electrode with a third insulating film disposed therebetween to fill the trench, and said first gate electrode has the same impurity concentration as said gate layer.

4. A high breakdown voltage semiconductor device according to claim 3, wherein said gate layer and said first gate electrode are formed by deposition of polysilicon.

5. A high breakdown voltage semiconductor device according to claim 1, wherein said source layer is formed by deposition of amorphous silicon.

6. A high breakdown voltage semiconductor device according to claim 1, wherein said source region, said drain region and said base region are formed by deposition of amorphous silicon.