Fully integrated ballast IC

• US 6,211,623 B1
• Filed: 01/05/1999
• Issued: 04/03/2001
• Est. Priority Date: 01/05/1998
• Status: Expired due to Term

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Houk, Talbott M., Ribarich, Thomas J., Wilhelm, Dana S.
• Primary Examiner(s): Wong, Don
• Assistant Examiner(s): Alemu, Ephrem
• Application Number:
  US09/225,635
• Time in Patent Office: 819 Days
• Field of Search: 315/224, 315/291, 315/209 R, 315/307, 315/308, 315/347, 315/DIG. 5, 315/DIG. 7, 315/91, 315/27
• US Class Current: 315/224
• CPC Class Codes: H05B 41/2983 against abnormal power supply conditions
• CPC Class Codes: H05B 41/2985 against abnormal lamp operating conditions
• CPC Class Codes: H05B 41/2988 for protecting the lamp against abnormal operating conditions

Abstract

A ballast controller integrated circuit which executes a specific set of instructions via an integrated state diagram architecture to control the fluorescent lamp and protect the ballast. The state diagram architecture controls powering up and down of the IC and the half-bridge circuit driven by the IC, preheating and striking of the lamp, running of the lamp, sensing for numerous possible fault conditions, and recovering from these fault conditions based on the normal maintenance of a lamp.

Claims

1. An integrated circuit for driving first and second MOS gated power transistors which are connected in a half bridge arrangement for supplying an oscillating current to power a fluorescent lamp through a lamp resonant circuit, the integrated circuit comprising circuitry for automatically switching between at least the following plurality of modes of operation in accordance with a state diagram in which the mode of operation is determined based upon the status of various inputs to the integrated circuit indicating the integrated circuit supply voltage, driver frequency, lamp fault or lamp exchange condition, DC bus voltage, and integrated circuit temperature, the plurality of modes of operation including:

1) an under voltage lockout mode;

2) a preheat mode;

3) an ignition ramp mode;

4) a run mode; and

5) a fault mode,

wherein the integrated circuit switches sequentially after power on from the under voltage lockout mode to the preheat mode, then to the ignition ramp mode, and then to the run mode under normal operating conditions; and

wherein the integrated circuit switches from the preheat mode, the ignition ramp mode, or the run mode to the under voltage lockout mode in the presence of a fault condition selected from the group consisting of insufficient integrated circuit supply voltage, insufficient DC bus voltage, and absence of a lamp; and

wherein the integrated circuit switches;

from the preheat mode to the fault mode when the temperature of the integrated circuit exceeds an over temperature condition;

from the ignition ramp mode to the fault mode when the temperature of the integrated circuit exceeds an over temperature condition, the lamp fails to strike or hard switching of the first and second MOS gated power transistors occurs; and

from the run mode to the fault mode when the temperature of the integrated circuit exceeds an over temperature condition, the lamp fails to strike or hard switching of the first and second MOS sated power transistors occurs, when the resonance frequency of the lamp resonant circuit is below a preset minimum, or a no load condition is present.

2. The integrated circuit of claim 1, wherein the integrated circuit switches from the under voltage mode to the preheat mode when the integrated circuit supply voltage is greater than an under voltage lockout value, the DC bus voltage is greater than a predetermined value, the presence of a lamp is detected, and the temperature of the integrated circuit is below a predetermined temperature.

3. The integrated circuit of claim 1, wherein the integrated circuit switches from the preheat mode to the ignition ramp mode in the absence of any fault conditions after a predetermined preheat time.

4. The integrated circuit of claim 1, wherein the integrated circuit switches from the ignition ramp mode to the run mode in the absence of any fault conditions upon completion of a ramp-up in voltage to a running voltage.

5. The integrated circuit of claim 1, further comprising circuitry for detecting the occurrence of non zero-voltage switching and for shutting down the supply of oscillating current to the fluorescent lamp upon such occurrence.

6. The integrated circuit of claim 1, further comprising circuitry for detecting the occurrence of near or below resonance operation of the fluorescent lamp and for shutting down the supply of oscillating current to the fluorescent lamp upon such occurrence.

7. The integrated circuit of claim 1, further comprising circuitry for detecting the occurrence of an over temperature condition of the integrated circuit and for shutting down the supply of oscillating current to the fluorescent lamp upon such occurrence.

8. The integrated circuit of claim 1, further comprising circuitry for detecting a fault in the DC bus or AC line voltage and for shutting down the supply of oscillating current to the fluorescent lamp upon such occurrence.

9. The integrated circuit of claim 1, further comprising circuitry for preventing the voltage across the lamp during the preheat mode from exceeding the strike voltage to ensure a flash-free start.

10. The integrated circuit of claim 9, wherein the circuitry for preventing the voltage across the lamp during the preheat mode from exceeding the strike voltage to ensure a flash-free start comprises circuitry for temporarily raising the frequency of the oscillating current supplied to the lamp during the initial portion of the preheat mode.

11. The integrated circuit of claim 9, wherein the circuitry for preventing the voltage across the lamp during the preheat mode from exceeding the strike voltage to ensure a flash-free start comprises circuitry for initially delaying the supply of oscillating current to the lamp during the beginning of the preheat mode until a timing capacitor is partially charged to ensure equal length gate pulses to the half bridge power transistors from the start.

12. A method for driving first and second MOS gated power transistors which are connected in a half bridge arrangement supplying an oscillating current to power a fluorescent lamp through a lamp resonant circuit, the method comprising switching an integrated circuit automatically between at least the following plurality of modes of operation in accordance with a state diagram in which the mode of operation is determined based upon the status of various inputs to the integrated circuit indicating the integrated circuit supply voltage, driver frequency, lamp fault or lamp exchange condition, DC bus voltage, and integrated circuit temperature, the plurality of modes of operation including:

1) an under voltage lockout mode;

2) a preheat mode;

3) an ignition ramp mode;

4) a run mode; and

5) a fault mode,

wherein the switching takes place sequentially after power on from the under voltage lockout mode to the preheat mode, then to the ignition ramp mode, and then to the run mode under normal operating conditions; and

wherein switching from the preheat mode, the ignition ramp mode, or the run mode to either the under voltage lockout mode or the fault mode occurs in response to a change in status of inputs to the integrated circuit indicating an abnormal condition, such that the integrated circuit switches from the preheat mode, the ignition ramp mode, or the run mode to the under voltage lockout mode in the presence of a fault condition selected from the group consisting of insufficient integrated circuit supply voltage, insufficient DC bus voltage, and absence of a lamp; and

the integrated circuit switches from the preheat mode to the fault mode when the temperature of the integrated circuit exceeds an over temperature condition;

from the ignition ramp mode to the fault mode when the temperature of the integrated circuit exceeds an over temperature condition, the lamp fails to strike or hard switching of the first and second MOS gated power transistors occurs; and

from the run mode to the fault mode when the temperature of the integrated circuit exceeds an over temperature condition, the lamp fails to strike or hard switching of the first and second MOS gated power transistors occurs, when the resonance frequency of the lamp resonant circuit is below a preset minimum, or a no load condition is present.