Ring oscillator having an externally adjustable variable frequency

• US 6,211,744 B1
• Filed: 04/28/1999
• Issued: 04/03/2001
• Est. Priority Date: 04/28/1998
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Shin, Dong-Myeong
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US09/302,077
• Time in Patent Office: 706 Days
• Field of Search: 331/57, 331/111, 331/143, 331/177 R, 331/179, 331/34
• US Class Current: 331/57
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: H03K 3/354 Astable circuits

Abstract

The present invention relates to a ring oscillator having a variable frequency allowing its use in a variety of application circuits. The ring oscillator produces an oscillating pulse signal having a frequency adjustable by an external input voltage. The ring oscillator includes an oscillating signal for generating an oscillating pulse signal, a frequency adjusting circuit, and an inverting circuit. The frequency adjusting circuit adjusts the frequency of the oscillating pulse signal responsive to the external input voltage, the external input voltage being different than a source voltage. The inverting circuit inverts the oscillating pulse signal.

Claims

1. A ring oscillator, comprising:

an oscillating circuit including a current mirror means coupled to a first and second capacitor, the oscillating circuit being adaptable to generate an oscillating pulse signal, the first and second capacitor being adaptable to vary a duty cycle of the oscillating pulse signal; and

a frequency adjusting circuit coupled to the oscillating circuit adaptable to vary a frequency of the oscillating pulse signal responsive to an external input voltage, the external input voltage being different than a supply voltage.

2. The ring oscillator of claim 1 wherein the oscillating pulse signal includes a constant duty cycle.

3. The ring oscillator of claim 2 wherein the oscillating circuit comprises:

a current supply means for supplying a current;

a charging/discharging means coupled to the current supply means for generating a first and a second node voltages by charging and discharging a first and second capacitors with the current responsive to an internal voltage;

a switching means coupled to the charging/discharging means for selectively providing either the first or a second node voltage as a switching means output signal responsive to a control signal; and

an inverting means including a first inverter for inverting the switching means output signal;

wherein the frequency adjusting circuit varies the frequency of the oscillating pulse signal by adjusting a charge/discharge time of the first capacitor.

4. The ring oscillator of claim 3 wherein the frequency adjusting circuit comprises:

a reference voltage means for supplying a reference voltage; and

a voltage comparator for comparing the reference voltage with the external input voltage and adjusting the charge/discharge time of the first capacitor in response thereto.

5. The ring oscillator of claim 4 wherein the current supply means comprises:

a current source;

a first PMOS transistor having a drain, a gate, and a source, the drain and the gate being commonly connected to the current source and the source being connected to the supply voltage;

a second PMOS transistor having a gate, a drain, and a source forming a current mirror with the first PMOS transistor, the gate being connected to the gate of the first PMOS transistor and the source being connected to the supply voltage; and

a first NMOS transistor having a drain, a gate, and a source, the gate and the drain being commonly connected to a drain of the second PMOS transistor and the source being connected to a ground voltage.

6. The ring oscillator of claim 5 wherein the first transistor forms a current mirror with the first NMOS transistor and the second transistor forms a current mirror with the first PMOS transistor.

7. The ring oscillator of claim 5 wherein the charging/discharging means includes:

a first and second transistors for generating a bias current corresponding to the current source; and

a first and second switching transistors connected in series to the first and second transistors, respectively, and in parallel to the first and second capacitors, respectively.

8. The ring oscillator of claim 6 wherein the switching means comprise:

a first switch including a third PMOS transistor and a second NMOS transistor, the third PMOS transistor being connected in parallel with the second NMOS transistor; and

a second switch coupled to the first switch including a fourth PMOS transistor and a third NMOS transistor, the fourth PMOS transistor being connected in parallel with the third NMOS transistor.

9. The ring oscillator of claim 8 wherein the inverting means comprises:

a first inverter including a fifth PMOS transistor and a fourth NMOS transistor for generating the control signal by inverting the switching means output signal;

a second inverter including a sixth PMOS transistor and a fifth NMOS transistor for generating the internal voltage by inverting control signal; and

a third inverter including a seventh PMOS transistor and a sixth NMOS transistor for generating a first output voltage by inverting the internal voltage.

10. The ring oscillator of claim 9 comprising an inverting output circuit for generating the second output voltage by inverting the first output voltage.

11. The ring oscillator of claim 10 wherein the inverting output circuit includes:

an eighth PMOS transistor having a gate connected to an output terminal of the third inverter and having a source connected to a supply voltage; and

a seventh NMOS transistor having a gate connected to an output terminal of the third inverter, a drain connected to a drain of the eighth PMOS transistor, and a source connected to the ground voltage.

12. The ring oscillator according to claim 11 wherein the frequency adjusting circuit comprises:

a first resistor having a first and a second end, the first end being connected to the supply voltage;

a second resistor having a first and a second end, the first end being connected to the second end of the first resistor and the second end being connected to the ground voltage;

a ninth PMOS transistor forming a current mirror with the first PMOS transistor;

a tenth PMOS transistor having a gate, a drain, and a source, the source being connected to a drain of the ninth PMOS transistor and the gate being connected to the first end of the second resistor;

an eighth NMOS transistor having a gate, a drain, and a source, the drain and gate being commonly connected to the drain of the tenth PMOS transistor and the source being connected to the ground voltage;

an eleventh PMOS transistor having a gate, a drain, and a source, the drain being connected to a drain of the ninth PMOS transistor and the gate receiving an external input voltage; and

a ninth NMOS transistor having a gate, a drain, and a source, the drain being connected to a drain of the first switching transistor and to the drain of the eleventh PMOS transistor and the source being connected to the ground voltage, the ninth NMOS transistor forming a current mirror with the eighth NMOS transistor.

13. The ring oscillator according to claim 11 wherein the frequency adjusting circuit comprises:

a ninth PMOS transistor forming a current mirror with the first PMOS transistor;

an eighth NMOS transistor having a gate, a drain, and a source, the drain being connected to a drain of the ninth PMOS transistor, the gate receiving an external input voltage, and the source being connected to the ground voltage;

a ninth NMOS transistor having a gate, a drain, and a source, the drain and gate being commonly connected to the drain of the ninth PMOS transistor and the source being connected to the ground voltage; and

a tenth NMOS transistor having a gate, a drain, and a source, the drain being connected to a drain of the first switching transistor and forming a current mirror with the ninth NMOS transistor.

14. The ring oscillator of claim 1 wherein increasing the external input voltage increases the frequency of the oscillating pulse signal.

15. A ring oscillator, comprising:

an oscillator circuit including a current mirror circuit coupled to a first and second capacitor, the oscillator circuit being adaptable to generate an oscillating pulse signal having a duty cycle that is proportional to the first and second capacitor; and

a frequency adjusting circuit adaptable to vary a frequency of the oscillating signal while maintaining constant a duty cycle of the oscillating signal responsive to an external voltage, the external voltage being different than a supply voltage.

16. The ring oscillator of claim 15 including and an inverting circuit for inverting the oscillating pulse signal.

17. The ring oscillator of claim 16 wherein the inverting circuit includes a PMOS transistor connected in series with an NMOS transistor.

18. The ring oscillator of claim 15 wherein the oscillator circuit includes:

a current supply circuit for supplying a current;

a charge/discharge circuit coupled to the current supply circuit for generating a first and a second node voltages by charging and discharging a first and second capacitors with the current;

a first switch circuit for generating a first internal voltage signal by selectively providing the first and a second node voltages responsive to a second internal voltage signal;

a first inverter circuit for generating the second internal voltage signal by inverting the first internal voltage signal;

a second inverter circuit for generating a third internal voltage signal by inverting the second internal voltage signal; and

a third inverter circuit for generating a first output voltage signal by inverting the third internal voltage signal.

19. The ring oscillator of claim 18 wherein the frequency adjusting circuit includes:

a voltage divider for generating a reference voltage from the voltage supply;

a differential amplifier for comparing the reference voltage to the external voltage; and

a current mirror coupled to the differential amplifier.

20. The ring oscillator of claim 18 wherein the frequency adjusting circuit includes:

a current mirror having a first and a second NMOS transistor;

a third NMOS transistor connected in parallel to the first NMOS transistor; and

a first PMOS transistor coupled to the first NMOS transistor.

21. The ring oscillator of claim 15 wherein the frequency adjust circuit is adaptable to increase the frequency of the oscillating pulse signal as the external voltage is increased.