Reference voltage circuit

• US 6,215,291 B1
• Filed: 04/17/2000
• Issued: 04/10/2001
• Est. Priority Date: 01/21/1999
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Mercer, Mark J.
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US09/550,850
• Time in Patent Office: 358 Days
• Field of Search: 323/312, 323/313, 323/314, 323/315, 323/316
• US Class Current: 323/313
• CPC Class Codes: H02J 7/0069 Charging or discharging for charge maintenance, battery initiation or rejuvenation
• CPC Class Codes: H02J 7/342 The other DC source being a battery actively interacting with the first one, i.e. battery to battery charging with circuits for polarity protection H02J7/0034

Abstract

A control circuit is provided to minimize the charging cycle time of a battery charging system by maximizing the length of time that high constant charging current is applied to a discharged battery. The control circuit includes a constant current (CC) error amplifier, a constant voltage (CV) error amplifier, an output amplifier, and two pole-splitting compensation networks. The control circuit works in conjunction with a power source to charge a secondary battery. The pole-splitting compensation networks allow the CC, CV, and output amplifiers to be configured for high gain, without sacrificing output stability. The control circuit provides a sharp transition between the CC mode and CV mode of operation. In the CC mode, fast bulk battery charging is provided. In the CV mode, the control circuit initially provides a “top-off” charge to the battery and subsequently safely maintains the battery at its fully charged state. By using bi-directional transconductance error amplifiers as the CC and CV error amplifiers, the control circuit can be optimized for pole-splitting compensation. The control circuit can be operated with a constant internal reference voltage or a variable internal reference voltage. When a variable internal reference voltage is applied, the charging cycle time of the control circuit is further minimized through a charge current compensation technique.

Claims

1. A reference voltage circuit, comprising:

a current mirror coupled to a first power supply;

a first transistor having a first current handling terminal coupled to said current mirror, a second current handling terminal providing a first current, and a control terminal coupled to a first bias source;

a second transistor having a first current handling terminal coupled to said current mirror, a second current handling terminal providing a second current, and a control terminal coupled to said first bias source;

a differential pair having a first input terminal coupled to receive said first current, a second input terminal coupled to receive said second current, a first and second output terminals providing a first output voltage, said first output voltage having a value indicative of a difference between said first current and said second current;

a bandgap reference circuit coupled to receive said first output voltage of said differential pair and generating a first reference voltage at an output terminal and

a third transistor having a first current handling terminal coupled to said first power supply, a second current handling terminal coupled to said output terminal of said bandgap reference circuit, and a control terminal coupled to said first current handling terminal of said second transistor;

wherein said first reference voltage varies in relation to said first power supply.

2. The reference voltage circuit of claim 1, wherein said first transistor and said second transistor are MOS transistors and each comprises a first diode disposed between said first current handling terminal and a ground node, and a second diode disposed between said second current handling terminal and said ground node.

3. The reference voltage circuit of claim 2, wherein said first and second diodes of each of said first and second transistors are formed between a diffusion region and a substrate of each of said first and second transistors.

4. The reference voltage circuit of claim 2, wherein said first and second cents are related to the reverse-biased diode currents of said first and second diodes.

5. The reference voltage circuit of claim 1, wherein said bandgap reference circuit comprises:

a first resistor coupled between said output terminal of said bandgap reference circuit and a first node;

a second resistor coupled between said first node and a second node;

a third resistor coupled between said first node and a third node, said third resistor having a resistance value substantially equal to said second resistor;

a fourth resistor coupled between said third node and a fourth node;

a first diode coupled between said second node and a ground node; and

a second diode coupled between said fourth node and said ground node.

6. The reference voltage circuit of claim 5, wherein said first and second diodes each comprises a diode-connected bipolar transistor, and said second diode has an emitter area substantially greater than an emitter area of said first diode.

7. A method for providing a reference voltage, comprising the steps of

providing a first voltage and a second voltage being related to a power supply voltage, said first voltage having a value different from said second voltage;

generating a first current based on said first voltage;

generating a second current based on said second voltage;

generating a third voltage based on a difference between said first current and said second current; and

generating said reference voltage based on a bandgap reference voltage and said third voltage.

8. The method of claim 7, wherein said step of generating a first current comprises the step of:

applying said first voltage to cause a first diode to be reverse biased; and

generating a reverse-biased diode current as said first current.

9. The method of claim 7, wherein said step of generating a second current comprises the step of:

applying said second voltage to cause a second diode to be reverse biased, and

generating a reverse-biased diode current as said second current.