Circuit and method for adaptive leading edge blanking in pulse width modulated current mode switching power supply controllers

• US 6,219,262 B1
• Filed: 05/08/2000
• Issued: 04/17/2001
• Est. Priority Date: 05/08/2000
• Status: Expired due to Term

• Current Assignee: Semtech Corporation
• Original Assignee: Semtech Corporation
• Inventors: Burgyan, Lajos
• Primary Examiner(s): NGUYEN, MATTHEW VAN
• Application Number:
  US09/567,205
• Time in Patent Office: 344 Days
• Field of Search: 363/16, 363/20, 363/21.01, 363/21.04, 363/21.05, 363/56.01, 363/56.09, 363/56.12, 363/95, 363/97, 363/131
• US Class Current: 363/97
• CPC Class Codes: H02M 1/0038 Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence

Abstract

A current sensing device incorporated into the gate charge current path of the power transistor in a typical pulse-width modulated current mode switching power supply controller provides adaptive leading edge blanking of the current-sense waveform present in the feedback signal to prevent erroneous response in the feedback control circuitry and improve regulation of the power supply output voltage. A serial switch located within the current-sense feedback signal path is directly controlled by the current sensing device to open and close the signal path and generate a blanking interval which is optimally aligned to blank out or remove the leading edge spike in the current-sense waveform which corresponds to the gate charge current pulse that occurs during the turn-on transition of the power transistor. The optimal alignment of the blanking interval is an inherent feature of the current sensing device since the device utilizes the gate charge current pulse to define the timing of the opening and closing of the serial switch. Furthermore, the current sensing device is inherently responsive to variables such as the transistor'"'"'s Miller capacitance or other manufacturing process and temperature related variations in gate-source capacitance which act to alter the width of the gate charge current pulse, and thus provides a blanking interval which adapts to or is independent of these variables. The width of the blanking interval automatically and dynamically adjusts to accommodate for changes in the leading edge spike of the current-sense waveform that result from the changing width in the gate charge current pulse.

Claims

1. A circuit for blanking out the leading edge current spike in the feedback path of a pulse-width modulated current mode switching power supply controller, comprising:

a current-sense resistor coupled to a transistor within said feedback path, said current-sense resistor providing a voltage waveform in response to current through said transistor;

a switch coupled to said current-sense resistor within said feedback path, said switch for alternately breaking and re-establishing continuity of said feedback path;

a current sensing device incorporated in the gate charge current path of said transistor for sensing said leading edge current spike and controlling said switch in response thereto, thereby breaking and re-establishing continuity of said feedback path to create a blanking interval optimally positioned such that the leading edge of said voltage waveform corresponding to said leading edge current spike is blanked out and not propagated through said switch.

2. The circuit as recited in claim 1, wherein said current sensing device dynamically adjusts the width of said blanking interval to the minimum amount required to blank out said leading edge of said voltage waveform.

3. The circuit as recited in claim 1, wherein said current sensing device automatically adjusts the width of said blanking interval to accommodate for the widening effect of Miller capacitance of said transistor on said leading edge current spike.

4. The circuit as recited in claim 1, wherein said current sensing device automatically adjusts the width of said blanking interval to accommodate for variations in the gate-source capacitance of said transistor.

5. The circuit as recited in claim 1, wherein said current sensing device automatically adjusts the width of said blanking interval to accommodate for variations in manufacturing process and temperature.

6. The circuit as recited in claim 1, wherein said current sensing device is implemented as a monolithic integrated circuit.

7. A method for blanking out the leading edge current spike in the feedback path of a pulse-width modulated current mode switching power supply controller, comprising the steps of:

providing a voltage waveform in response to current flow through a current-sense resistor coupled to a transistor within said feedback path;

alternately breaking and re-establishing continuity of said feedback path with a switch coupled to said current-sense resistor within said feedback path;

controlling said switch with a current sensing device incorporated in the gate charge current path of said transistor which senses said leading edge current spike and causes said breaking and re-establishing continuity such that a blanking interval is optimally positioned to remove the leading edge of said voltage waveform corresponding to said leading edge current spike from said feedback path.

8. The method as recited in claim 7, wherein said current sensing device dynamically adjusts the width of said blanking interval to the minimum amount required to blank out said leading edge of said voltage waveform.

9. The method as recited in claim 7, wherein said current sensing device automatically adjusts the width of said blanking interval to accommodate for the widening effect of Miller capacitance of said transistor on said leading edge current spike.

10. The method as recited in claim 7, wherein said current sensing device automatically adjusts the width of said blanking interval to accommodate for variations in the gate-source capacitance of said transistor.

11. The method as recited in claim 7, wherein said current sensing device automatically adjusts the width of said blanking interval to accommodate for variations in manufacturing process and temperature.

12. The method as recited in claim 7, wherein said current sensing device is implemented as a monolithic integrated circuit.