Electronic power supply device

• US 6,219,263 B1
• Filed: 11/18/1997
• Issued: 04/17/2001
• Est. Priority Date: 05/19/1995
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Inventors: Wuidart, Luc
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US08/945,921
• Time in Patent Office: 1,246 Days
• Field of Search: 363/125, 363/126, 363/127, 363/128, 363/81, 363/84
• US Class Current: 363/125
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 1/4266 using passive elements
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

A power factor correction circuit using a first rectifier diode to control the series charging of two capacitors and two rectifier diodes to control the parallel discharging of the two capacitors. The power factor correction circuit further includes a resistor that is series-connected with the first diode to improve the power factor and to reduce the current drawn when the voltage is turned on. The rectifier diodes are advantageously voltage limiting diodes to protect the downline circuitry against overvoltages. In one improvement, a current-controlled electronic switch is used for protection against overvoltages that are just above the peak value of the line voltage.

Claims

1. An electronic supply device for a load comprising:

a bridge rectifier having a pair of input terminals that receive a periodic voltage and a pair of output terminals; and

a power factor correction circuit connected to the pair of output terminals of the bridge rectifier, the power factor correction circuit including two capacitors, a first rectifier diode coupled to the two capacitors to charge the two capacitors in series, and second and third rectifier diodes coupled to the two capacitors to discharge the two capacitors in parallel, wherein the power factor correction circuit further includes;

a resistor that is series-connected with the first rectifier diode to limit the current drawn in the two capacitors and to reduce low frequency harmonic contents of a current conducted by the bridge rectifier;

a current-controlled electronic switch that is parallel-connected with the first rectifier diode in series with the resistor; and

wherein, to discharge the two capacitors in parallel, the second and third rectifier diodes are zener diodes, to protect the load against overvoltages.

2. The electronic supply device of claim 1, wherein said current-controlled electronic switch is a triac.

3. The electronic supply device of claim 1, wherein a current that controls the current controlled-electronic switch is provided by one of the zener diodes.

4. The electronic supply device of claim 1, wherein the resistor is calibrated to dissipate at most 1% of a nominal power available at the pair of output terminals of the bridge rectifier.

5. The electronic supply device of claim 1, wherein the second and third rectifier diodes are arranged to dissipate overvoltage conditions occurring between the pair of output terminals of the bridge rectifier, and wherein the electronic supply device is integrated within a single integrated circuit.

6. A power factor correction circuit comprising:

a pair of terminals that receive a periodically varying input voltage, the pair of terminals including a first terminal and a second terminal;

a first capacitor and a second capacitor coupled in series between the first terminal and the second terminal, the first capacitor storing a first voltage, and the second capacitor storing a second voltage;

a first voltage controlled switch coupled in series between the first capacitor and the second capacitor that allows charging the first and second capacitors when the input voltage is greater than a sum of the first voltage and the second voltage;

a second voltage controlled switch having a first end that is connected to the first terminal and a second end that is coupled between the first voltage controlled switch and the second capacitor the second voltage controlled switch allowing discharge of the second capacitor when the input voltage is less than the second voltage;

a third voltage controlled switch having a first end that is connected to the second terminal and a second end that is connected between the first voltage controlled switch and the first capacitor, the third voltage controlled switch allowing discharge of the first capacitor when the input voltage is less than the first voltage; and

a resistor connected in series between the first capacitor and the first voltage controlled switch that limits a charging current of the first and second capacitors and attenuates low frequency harmonic contents of the charging current when the input voltage is greater than the sum of the first voltage and the second voltage;

wherein the second and third voltage controlled switches have second and third overvoltage limits respectively, and the power factor correction circuit further comprises;

an overvoltage protection assembly having a first end that is connected between the first capacitor and the resistor and having a second end that is connected to the second end of the second voltage controlled switch the overvoltage protection assembly limiting a voltage difference between the first and second terminals to a sum of the overvoltage limits of the second and third voltage controlled switches; and

wherein the overvoltage protection assembly includes;

a current controlled electronic switch; and

a second resistor, the second resistor being connected in series with the current controlled electronic switch.

7. The power factor correction circuit of claim 6, wherein the power factor collection circuit further comprises:

a fourth voltage controlled switch that couples the second end of the second voltage controlled switch between the first voltage controlled switch and the second capacitor to accurately control the current controlled electronic switch when the periodically varying input voltage exceeds a sum of the second and third overvoltage limits.

8. The power factor correction circuit of claim 7, wherein:

the current controlled electronic switch is a triac;

the second and third voltage controlled switches are zener diodes each having a substantially similar overvoltage limit that is greater than either of the first voltage and the second voltage and lower than the sum of the first voltage and the second voltage; and

the fourth voltage controlled switch is a zener diode.

9. The power factor correction circuit of claim 6 or 7, wherein the power factor correction circuit is integrated within a single integrated circuit.