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Universal serial bus (USB) RAM architecture for use with microcomputers via an interface optimized for integrated services device network (ISDN)

  • US 6,219,736 B1
  • Filed: 11/12/1998
  • Issued: 04/17/2001
  • Est. Priority Date: 04/24/1997
  • Status: Expired due to Term
First Claim
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1. A RAM-based interrupt-driven interface device for establishing a communication link between a high performance serial bus host and a microcontroller device for providing a control function, the interface being operative to receive digital information in the form of command, data and control packets from the host and to process the packets and communicate the processed digital information to the microcontroller device, and in response thereto, the microcontroller device being operative to communicate digital information to the interface device for processing and transfer to the host, comprising:

  • means for receiving through said serial bus, a command generated by the host;

    means for storing the host-generated command and for generating an interface device interrupt signal upon storage of said host-generated command for use by the microcontroller device in responding to the host-generated command;

    a microcontroller bus for transferring digital information and said interface device interrupt signal between the interface device and the microcontroller device;

    means for receiving a microcontroller command from the microcontroller device in response to said interface device interrupt signal; and

    means for storing said microcontroller command and operative to generate a microcontroller device interrupt signal, upon storage of said microcontroller command, for use by the interface device in developing an address for selection of the interface device by the host during subsequent communications therebetween;

    wherein during communication between the host and the interface device, the interface device-developed address is used by the interface device to identify host-provided packet information, and upon processing of the host-provided information, to allow the interface device to respond to the host, thereby allowing a generic microcontroller device to be flexibly interfaced with a high performance serial bus host for communication therebetween.

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