Effective diffusion barrier process and device manufactured thereby

• US 6,221,758 B1
• Filed: 01/04/1999
• Issued: 04/24/2001
• Est. Priority Date: 01/04/1999
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Shue, Shau-Lin, Yu, Chen-Hua, Liu, Chung-Shi
• Primary Examiner(s): Bowers, Charles
• Assistant Examiner(s): NGUYEN, THANH T
• Application Number:
  US09/225,064
• Time in Patent Office: 841 Days
• Field of Search: 438/626-629, 438/633, 438/637-641, 438/643-644, 438/648, 438/668, 438/672, 438/675, 438/685, 438/687
• US Class Current: 438/626
• CPC Class Codes: H01L 21/76805 the opening being a via or contact hole penetrating the underlying conductor
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner

Abstract

In forming a semiconductor device in which an electrically conductive substrate is covered with a dielectric layer by the following steps, form a trench with a trench line on top and a contact hole on the bottom in the dielectric layer with the overall trench reaching down to the substrate. Preclean the trench. Form a tantalum film over the dielectric layer including the trench walls, covering the exposed the substrate surface. Fill grain boundaries of the tantalum film with at least one of tantalum oxide and tantalum nitride forming a filled tantalum film. Form a redeposited tantalum layer above the filled tantalum film. Form a copper seed film above the redeposited tantalum film. Plate the device filling the trench with a plated bulk copper layer on the seed film. Planarize the device to expose the top surface of the dielectric layer, removing surplus portions of the filled tantalum film, the copper seed film, and the bulk copper layer. The filled tantalum film is formed by exposing the tantalum to air under STP atmospheric conditions or by exposure to a nitrous oxide (N₂O) gas in a plasma at a temperature of about 400° C.

Claims

1. A method of forming a semiconductor device in which an electrically conductive substrate is covered with a dielectric layer comprising:

forming a trench for a dual damascene structure comprising a trench line space and a contact hole in said dielectric layer, said trench reaching down to expose a portion of said substrate, said trench having walls,

then precleaning said trench with argon sputtering,

forming a tantalum metal film superjacent to said dielectric layer including said walls and covering said portion of said substrate,

filling grain boundaries of said tantalum metal film with at least one of tantalum oxide and tantalum nitride forming a filled tantalum film to form a stuffed tantalum film filling grain boundaries/interstices with additional tantalum oxide formed on the surface of the tantalum film,

forming a copper seed film above said stuffed tantalum metal film,

plating said device filling said trench with a plated bulk copper layer superjacent to said copper seed film, and

planarizing said device to expose the top surface of said dielectric layer, removing surplus portions of said filled tantalum film, said copper seed film, and said bulk copper layer.

2. A method in accordance with claim 1 wherein:

said filled tantalum film is formed by exposing said tantalum to air under STP atmospheric conditions.

3. A method in accordance with claim 1 wherein:

said filled tantalum film is formed by exposure to a nitrous oxide (N₂O) gas in a plasma at a temperature of about 400°

C.

4. A method in accordance with claim 1 wherein:

after filling said tantalum film, form a redeposited tantalum layer superjacent to said filled tantalum film.

5. A method in accordance with claim 1 wherein:

said filled tantalum film is formed by exposing said tantalum to air under STP atmospheric conditions, and

after filling said tantalum film, form a redeposited tantalum layer superjacent to said filled tantalum film.

6. A method in accordance with claim 1 wherein:

said filled tantalum film is formed by exposure to a nitrous oxide (N2O) gas in a plasma at a temperature of about 400°

C., and

after filling said tantalum film, form a redeposited tantalum layer superjacent to said filled tantalum film.

7. A method of forming a semiconductor device in which an electrically conductive substrate is covered with a dielectric layer comprising:

forming a trench for a dual damascene structure comprising a trench line space and a contact hole in said dielectric layer, said trench reaching down to expose a portion of said substrate, said trench having walls,

then precleaning said trench by argon sputtering,

forming a tantalum metal film superjacent to said dielectric layer including said walls and covering said portion of said substrate,

filling grain boundaries of said tantalum metal film with at least one of tantalum oxide and tantalum nitride forming a stuffed tantalum metal film,

after filling said tantalum film, forming a redeposited tantalum layer superjacent to said stuffed tantalum film,

forming a copper seed film above said filled tantalum film,

plating said device filling said trench with a plated bulk copper layer superjacent to said copper seed film,

planarizing said device to expose the top surface of said dielectric layer, removing surplus portions of said filled tantalum film, said copper seed film, and said bulk copper layer.

8. A method of forming a semiconductor device in which an electrically conductive substrate is covered with a dielectric layer comprising:

forming a trench in said dielectric layer comprising a dual damascene structure with a trench line space stacked above a contact hole in said dielectric layer, said trench reaching down to expose a portion of said substrate, said trench having walls,

said trench is precleaned with argon sputtering prior to forming said tantalum film,

forming a tantalum metal film superjacent to said dielectric layer including said walls and covering said portion of said substrate having a thickness from about 20 Å

to about 500 Å

,

filling grain boundaries of said tantalum metal film with at least one of tantalum oxide and tantalum nitride forming a stuffed tantalum film,

after filling said tantalum film, forming a redeposited tantalum layer superjacent to said stuffed tantalum metal film,

forming a copper seed film superjacent to said redeposited tantalum film,

plating said device filling said trench with a plated bulk copper layer superjacent to said copper seed film, and

planarizing said device to expose the top surface of said dielectric layer, removing surplus portions of

said filled tantalum film, said copper seed film, and said bulk copper layer.

9. A method in accordance with claim 8 wherein:

said filled tantalum film is formed by exposing said tantalum to air under STP atmospheric conditions.

10. A method in accordance with claim 8 wherein:

said filled tantalum film is formed by exposure to a nitrous oxide (N₂O) gas in a plasma at a temperature of about 400°

C.

11. A method of forming a semiconductor device with a dielectric layer formed over an electrically conductive substrate comprising:

forming a trench for a dual damascene structure comprising a trench line space and a contact hole in said dielectric layer, said trench reaching down to expose a portion of said substrate, said trench having walls,

then precleaning said trench with argon sputtering,

then forming a tantalum metal film superjacent to said dielectric layer including said walls and covering said portion of said substrate,

then forming a stuffed tantalum film by filling grain boundaries of said tantalum metal film with at least one of tantalum oxide and tantalum nitride,

said filled tantalum metal film being formed by exposure to a nitrous oxide (N₂O) gas in a plasma at a temperature of about 400°

C., and

after filling said tantalum metal film, forming a redeposited tantalum layer superjacent to said stuffed tantalum film,

forming a copper seed film above said stuffed tantalum film,

plating said device filling said trench with a plated bulk copper layer superjacent to said copper seed film,

planarizing said device to expose the top surface of said dielectric layer, removing surplus portions of said filled tantalum film, said copper seed film, and said bulk copper layer.