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Power consumption reduction in medical devices employing multiple digital signal processors and different supply voltages

  • US 6,223,080 B1
  • Filed: 10/28/1998
  • Issued: 04/24/2001
  • Est. Priority Date: 04/29/1998
  • Status: Expired due to Term
First Claim
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1. A method for conserving electrical power consumed by a medical device including one or more analog circuits and one or more digital circuits, the method comprising the steps of:

  • providing a first digital signal processor coupled to at least one of the one or more analog circuits of the medical device for receiving analog data representative of at least a first analog input;

    operating on the analog data representative of the first analog input using the first digital signal processor to perform at least a first function during a predetermined time period, the first digital signal processor operating at a first clock frequency to perform the first function;

    providing a second digital signal processor coupled to at least one of the one or more analog circuits of the medical device for receiving analog data representative of at least a second analog input;

    operating of the analog data representative of the second analog input using the second digital signal processor to perform at least a second function during the predetermined time period, the second digital signal processor operating at a second clock frequency to perform the second function;

    applying a first fixed supply voltage to the one or more digital circuits; and

    generating a second fixed supply voltage for application to the one or more analog circuits using the first fixed supply voltage, wherein the second fixed supply voltage is greater than the first fixed supply voltage, wherein the first and second clock frequencies are such that the power consumed by the first and second digital signal processors in performance of the first and second functions during the predetermined time period is less than the power that would be consumed if only one of the first and second digital signal processors were to perform both of the first and second functions within the predetermined time period.

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