Flip-Chip interconnections using lead-free solders

• US 6,224,690 B1
• Filed: 03/12/1996
• Issued: 05/01/2001
• Est. Priority Date: 12/22/1995
• Status: Expired due to Term

• Current Assignee: Ultratech Incorporated (Veeco Instruments Incorporated)
• Original Assignee: International Business Machines Corporation
• Inventors: Datta, Madhav, Kwietniak, Keith Thomas, Purushothaman, Sampath, Deligianni, Hariklia, Shi, Leathen, Kang, Sung Kwon, Tong, Ho-Ming, Horkans, Wilma Jean, Andricacos, Panayotis Constantinou, Mathad, Gangadhara Swami
• Primary Examiner(s): Ip, Sikyin
• Application Number:
  US08/614,984
• Time in Patent Office: 1,876 Days
• Field of Search: 420/459, 420/562, 420/557, 257/738, 257/751, 257/753, 257/766, 257/772, 257/778, 257/781, 428/620, 428/667, 437/183, 437/189, 437/190, 437/192, 148/400
• US Class Current: 148/400
• CPC Class Codes: B23K 2035/008 at least one of the workpieces being of silicium
• CPC Class Codes: B32B 15/01 all layers being exclusively metallic making layered metal workpieces by pressure cladding B23K20/22; making coatings with a metallic material characterised by its composition C23C30/00
• CPC Class Codes: C22C 13/00 Alloys based on tin
• CPC Class Codes: C22C 13/02 with antimony or bismuth as the next major constituent
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05171 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 2224/11849 Reflowing
• CPC Class Codes: H01L 2224/119 Methods of manufacturing bump connectors involving a specific sequence of method steps
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13022 the bump connector being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01026 : Iron [Fe]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01061 : Promethium [Pm]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/013 : Alloys
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

An interconnection structure suitable for the connection of microelectronic circuit chips to packages is provided by this invention. In particular, the invention pertains to the area-array or flip-chip technology often called C4 (controlled collapse chip connection). The structure comprises an adhesion/barrier layer deposited on a passivated substrate (e.g., a silicon wafer), optionally an additional adhesion layer, a solderable layer of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo, CoFe and NiCoFe on the adhesion/barrier layer, and a lead-free solder ball comprising tin as the predominate component and one or more alloying elements selected from Bi, Ag, and Sb, and further optionally including one or more elements selected from the group consisting of Zn, In, Ni, Co and Cu.

Claims

1. An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising:

a two-layer ball-limiting metallurgy comprising an adhesion/barrier layer and a copper-free solderable layer wherein said adhesion/barrier layer is between a microelectronic device and said copper-free solderable layer and wherein said copper-free solderable layer is of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo and NiCoFe, each said metal from said group being sufficiently non-reactive with components of a tin-containing lead free solder, such that said copper-free solderable layer remains after being placed in contact therewith in a soldering action; and

one or more lead-free solder balls selectively situated on said copper-free solderable layer, said lead-free solder balls consisting of tin as the predominant component and one or more alloying components selected from the group consisting of Bi, Ag and Sb, whereby said lead-free solder ball substantially avoids alpha particle emission and induced soft logic errors which result therefrom.

2. The interconnection structure defined in claim 1 wherein said one or more alloying components of said lead-free solder ball are in the ranges of about 1 to 20% for Bi, 1 to 5% for Ag and 1 to 10% for Sb.

3. The interconnection structure defined in claim 2 wherein said one or more alloying components of said lead-free solder ball are about 5% Bi, 3.5% Ag or 5% Sb.

4. The interconnection structure defined in claim 1 wherein the composition of said solderable layer is at least 20% Fe and the balance is Ni.

5. The interconnection structure defined in claim 4 wherein the composition of said solderable layer is about 50% Fe and about 50% Ni.

6. An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising:

a two-layer ball-limiting metallurgy comprising an adhesion/barrier layer and a copper-free solderable layer wherein said adhesion/barrier layer is between a microelectronic device and said copper-free solderable layer and wherein said copper-free solderable layer is of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo and NiCoFe, each said metal from said group being sufficiently non-reactive with components of a tin-containing lead free solder, such that said copper-free solderable layer remains after being placed in contact therewith in a soldering action; and

one or more lead-free solder balls selectively situated on said copper-free solderable layer, said lead-free solder balls consisting of tin as the predominant component, one or more alloying components selected from the group consisting of Bi, Ag and Sb, and one or more additional alloying components selected from the group consisting of Zn, In, Ni, Co, and Cu in the range of about 0.5 to 5% for Zn, 0.5 to 5% for Ni, 0.5 to 5% for Co, 0.5 to 5% for Cu and 0.5 to 10% for In, whereby said lead-free solder ball substantially avoids alpha particle emission and induced soft logic errors which result therefrom.

7. An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising:

a three-layer ball-limiting metallurgy comprising an adhesion/barrier layer, an adhesion layer on top of said adhesion/barrier layer and a copper-free solderable layer wherein said adhesion/barrier layer is between a microelectronic device and said adhesion layer and wherein said copper-free solderable layer is of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo and NiCoFe, each said metal from said group being sufficiently non-reactive with components of a tin-containing lead free solder, such that said copper-free solderable layer remains after being placed in contact therewith in a soldering action; and

one or more lead-free solder balls selectively situated on said copper-free solderable layer, said lead-free solder balls consisting of tin as the predominant component and one or more alloying components selected from the group consisting of Bi, Ag and Sb, whereby said lead-free solder ball substantially avoids alpha particle emission and induced soft logic errors which result therefrom.

8. The interconnection structure defined in claim 7 wherein said one or more alloying components of said lead free solder ball are in the ranges of about 1 to 20% for Bi, 1 to 5% for Ag and 1 to 10% for Sb.

9. The interconnection structure defined in claim 8 wherein said alloying components of said lead-free solder ball are about 5% Bi, 3.5% Ag or 5% Sb.

10. The interconnection structure defined in claim 7 wherein the composition of said solderable layer is at least 20% Fe and the balance is Ni.

11. The interconnection structure defined in claim 10 wherein the composition of said solderable layer is about 50% Fe and about 50% Ni.

12. An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising:

a three-layer ball-limiting metallurgy comprising an adhesion/barrier layer, an adhesion layer on top of said adhesion/barrier layer and a copper-free solderable layer wherein said adhesion/barrier layer is between a microelectronic device and said adhesion layer and wherein said copper-free solderable layer is of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo and NiCoFe, each said metal from said group being sufficiently non-reactive with components of a tin-containing lead free solder, such that said copper-free solderable layer remains after being placed in contact therewith in a soldering action; and

one or more lead-free solder balls selectively situated on said copper-free solderable layer, said lead-free solder balls consisting of tin as the predominant component, one or more alloying components selected from the group consisting of Bi, Ag and Sb, and one or more additional alloying components selected from the group consisting of Zn, In, Ni, Co and Cu in the range of about 0.5 to 5% for Zn, 0.5 to 5% for Ni, 0.5 to 5% for Co, 0.5 to 5% for Cu and 0.5 to 10% for In, whereby said lead-free solder ball substantially avoids alpha particle emission and induced soft logic errors which result therefrom.