Inductance device formed on semiconductor substrate

• US 6,225,677 B1
• Filed: 10/21/1998
• Issued: 05/01/2001
• Est. Priority Date: 03/11/1998
• Status: Expired due to Term

• Current Assignee: Socionext Inc.
• Original Assignee: Fujitsu Limited
• Inventors: Kobayashi, Osamu
• Primary Examiner(s): Mintel, William
• Assistant Examiner(s): Hu, Shouxiang
• Application Number:
  US09/175,975
• Time in Patent Office: 923 Days
• Field of Search: 257/531, 257/528, 257/544, 216/2
• US Class Current: 257/531
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors

Abstract

According to a first aspect of the present invention, a plurality of PN junctions are formed at the surface of a semiconductor substrate under a belt-like conductive film having a spiral shape which constitutes an inductance device. A reverse bias voltage is applied to the PN junctions, and the surface of the substrate is completely depleted. Since the reverse bias voltage is applied to the PN junctions, even though the impurity density of the surface of the substrate is high and the adjacent PN junctions are separated to a degree, the extension of the depletion layers can be increased and complete depletion of the surface of the substrate can be achieved.

Claims

1. An inductance device formed on a semiconductor substrate comprising:

a plurality of PN junctions formed at the surface of said semiconductor substrate; and

a belt-like conductive film having a coil shape and constituting said inductance device, formed on an insulating film over an area in which said plurality of PN junctions are formed,

wherein a reverse bias voltage is applied between said plurality of PN junctions, so that said area in said semiconductor substrate is completely depleted.

2. An inductance device according to claim 1,

wherein said semiconductor substrate has one conductive type,

first impurity regions having an opposite conductive type, whose impurity density progressively increases from the surface of the substrate toward an inside of the substrate, are formed at said surface of said substrate, so that said PN junctions are formed, and

the reverse bias voltage applied to said first impurity areas is applied from an inside portion of said first impurity regions is applied from an inside portion of said first impurity regions in said substrate.

3. An inductance device according to claim 2, further comprising:

a second impurity region having said opposite conductive type, which is connected to said first impurity regions and is embedded in said substrate,

wherein said reverse bias voltage is applied through said second impurity region.