Compensated semiconductor pressure sensor
First Claim
1. A semiconductor pressure sensor, comprising:
- a sensor capsule including a semiconductor die having a diaphragm region to deflect responsive to applied pressure, a nominally rigid rim region to support the periphery of the diaphragm region, an outer frame region, and a stress isolation region to couple the rim region to the outer frame region, and a silicon cap that is bonded to the outer frame region of the semiconductor die to cover the diaphragm region; and
a pressure port hermetically attached to the sensor capsule.
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Accused Products
Abstract
A semiconductor pressure sensor compatible with fluid and gaseous media applications is described. The semiconductor pressure sensor includes a sensor capsule having a semiconductor die and a silicon cap that is bonded to the semiconductor die. The semiconductor die includes a diaphragm that incorporates piezoresistive sensors thereon, and a stress isolation mechanism for isolating the diaphragm from packaging and mounting stresses. The silicon cap includes a cavity for allowing the diaphragm to deflect. The semiconductor pressure sensor further includes a pressure port that is hermetically attached to the semiconductor die. The sensor capsule and pressure port may be incorporated into a plastic housing. In one embodiment, the silicon cap is bonded to the semiconductor die to form an integral pressure reference. In an alternative embodiment, a second pressure port is provided for allowing gage or differential pressure measurements. A technique for incorporating the piezoresistive sensors is also described. An ASIC may be optionally attached to the silicon cap, and/or active electronic circuitry may be fabricated on the semiconductor die or silicon cap. Additional coatings may be optionally applied to the pressure port and semiconductor die for enhancing chemical resistance.
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Citations
47 Claims
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1. A semiconductor pressure sensor, comprising:
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a sensor capsule including a semiconductor die having a diaphragm region to deflect responsive to applied pressure, a nominally rigid rim region to support the periphery of the diaphragm region, an outer frame region, and a stress isolation region to couple the rim region to the outer frame region, and a silicon cap that is bonded to the outer frame region of the semiconductor die to cover the diaphragm region; and
a pressure port hermetically attached to the sensor capsule. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
a first member including a first end coupled to a frame region of the semiconductor die, and a second end; and
a second member including a first end coupled to the second end of the first member, and a second end coupled to a rim region of the semiconductor die.
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17. The semiconductor pressure sensor of claim 16 wherein a first wall etch defines the first member and a second wall etch, in combination with the first wall etch, defines the second member.
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18. The semiconductor pressure sensor of claim 9 wherein the diaphragm includes:
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a first silicon region of a first conductivity type and a second silicon region of a second conductivity type surrounding the first silicon region; and
a stress-sensitive diffused resistive element formed on the deformable member in the first silicon region.
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19. The semiconductor pressure sensor of claim 18 further comprising second, third, and fourth resistive elements, said resistive elements formed on diaphragm in the first silicon region.
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20. The semiconductor pressure sensor of claim 19 wherein the resistive elements are connected in a Wheatstone bridge configuration.
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21. The semiconductor pressure sensor of claim 18 wherein the first conductivity type is an N−
- semiconductor material and the second conductivity type is a P−
semiconductor material.
- semiconductor material and the second conductivity type is a P−
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22. The semiconductor pressure sensor of claim 18 wherein the silicon region of the first conductivity type is connected to a voltage that is higher than or at the same potential as the resistive element potential.
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23. The semiconductor pressure sensor of claim 9 further comprising:
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a boss coupled to a first side of the diaphragm along an axis of the diaphragm; and
a plurality of piezoresistors disposed on a second side of the diaphragm in regions not occupied by the boss along the axis.
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24. The semiconductor pressure sensor of claim 23, wherein first and second piezoresistors are placed in regions of highest tensile stress along the axis to increase sensitivity of applied pressure.
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25. The semiconductor pressure sensor of claim 24, wherein third and fourth piezoresistors are placed in regions of highest compressive stress along the axis to increase sensitivity of applied pressure.
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26. The semiconductor pressure sensor of claim 23, wherein the plurality of piezoresistors are oriented perpendicular to the axis.
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27. The semiconductor pressure sensor of claim 1 further comprising a media coating over the pressure port and exposed areas of the sensor capsule.
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28. The semiconductor pressure sensor of claim 1 wherein the silicon cap and the semiconductor die are bonded together to form a bond region, and wherein the semiconductor die includes a doped region covered by an oxide layer that electrically couples a first region located on one side of the bond region and a second region located on the opposite side of the bond region.
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29. A semiconductor pressure sensor, comprising:
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a sensor capsule including a semiconductor die and a silicon cap that are bonded together, the semiconductor die including a diaphragm region to deflect responsive to applied pressure, the diaphragm region including an epi-layer of a first conductivity type adjacent a top die surface and a buried layer of a second conductivity type adjacent the epi-layer and an opposing bottom diaphragm surface, the buried layer being a portion of a substrate of the second conductivity type, the buried layer portion of the substrate being adjacent the surface of the substrate opposite the bottom die surface, a nominally rigid region coupled to the periphery of the diaphragm region, the rigid region including the epi-layer, the buried layer, and the substrate, and a piezoresistive sensor with a first portion in the diaphragm region and a second portion in the rigid region, the piezoresistive sensor including a diffused region of the second conductivity type extending from the top die surface to the buried layer, an epi-pocket formed by the portion of the epi-layer that is surrounded by the diffused region, and a piezoresistor of the second conductivity type formed in the epi-pocket adjacent the top die surface;
a pressure port hermetically attached to the sensor capsule with a eutectic solder; and
a housing that houses the sensor capsule and the pressure port. - View Dependent Claims (30, 31, 32, 35)
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33. A semiconductor die, comprising:
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a diaphragm region to deflect responsive to applied pressure, the diaphragm region including an epi-layer of a first conductivity type adjacent a top die surface and a buried layer of a second conductivity type adjacent the epi-layer and an opposing bottom diaphragm surface, the buried layer being a portion of a substrate of the second conductivity type, the buried layer portion of the substrate being adjacent the surface of the substrate opposite the bottom die surface;
a nominally rigid region coupled to the periphery of the diaphragm region, the rigid region including the epi-layer, the buried layer, and the substrate; and
a piezoresistive sensor with a first portion in the diaphragm region and a second portion in the rigid region, the piezoresistive sensor including a diffused region of the second conductivity type extending from the top die surface to the buried layer;
an epi-pocket formed by the portion of the epi-layer that is surrounded by the diffused region; and
a piezoresistor of the second conductivity type formed in the epi-pocket adjacent the top die surface. - View Dependent Claims (34, 36, 37)
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38. A semiconductor pressure sensor, comprising:
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a sensor capsule including a semiconductor die and a silicon cap that are bonded together, the semiconductor die including a diaphragm region to deflect responsive to applied pressure, the diaphragm region including an epi-layer of a first conductivity type adjacent a top die surface and a buried layer of a second conductivity type adjacent the epi-layer and an opposing bottom diaphragm surface, a nominally rigid region coupled to the periphery of the diaphragm region, the rigid region including the epi-layer, the buried layer, and the substrate, an outerframe region, a stress isolation region to couple the rigid region to the outer frame region, and a piezoresistive sensor with a first portion in the diaphragm region and a second portion in the rigid region, the piezoresistive sensor including a diffused region of the second conductivity type extending from the top die surface to the buried layer, an epi-pocket formed by the portion of the epi-layer that is surrounded by the diffused region, and a piezoresistor of the second conductivity type formed in the epi-pocket adjacent the top die surface;
a pressure port hermetically attached to the sensor capsule with a eutectic solder; and
a housing that houses the sensor capsule and the pressure port. - View Dependent Claims (39, 40, 41, 42)
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43. A semiconductor die, comprising:
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a diaphragm region to deflect responsive to applied pressure, the diaphragm region including an epi-layer of a first conductivity type adjacent a top die surface and a buried layer of a second conductivity type adjacent the epi-layer and an opposing bottom diaphragm surface;
a nominally rigid region coupled to the periphery of the diaphragm region, the rigid region including the epi-layer, the buried layer, and a substrate adjacent the buried layer and an opposing bottom die surface;
an outer frame region;
a stress isolation region to couple the rigid region to the outer frame region; and
a piezoresistive sensor with a first portion in the diaphragm region and a second portion in the rigid region, the piezoresistive sensor including a diffused region of the second conductivity type extending from the top die surface to the buried layer;
an epi-pocket formed by the portion of the epi-layer that is surrounded by the diffused region; and
a piezoresistor of the second conductivity type formed in the epi-pocket adjacent the top die surface. - View Dependent Claims (44, 45, 46, 47)
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Specification