Voltage and current limiting method and apparatus for a voltage/frequency drive

• US 6,229,278 B1
• Filed: 09/29/1999
• Issued: 05/08/2001
• Est. Priority Date: 09/29/1999
• Status: Expired due to Term

• Current Assignee: Allen-Bradley Company LLC (Rockwell Automation, Inc.)
• Original Assignee: Rockwell Technologies, LLC (Teledyne Technologies Incorporated)
• Inventors: Garces, Luis J., Rowan, Timothy M.
• Primary Examiner(s): Nappi, Robert E.
• Assistant Examiner(s): Duda, Rina I.
• Application Number:
  US09/408,007
• Time in Patent Office: 587 Days
• Field of Search: 318/801, 318/805, 318/806, 318/798, 318/808
• US Class Current: 318/801
• CPC Class Codes: H02M 7/53875 with analogue control of three-phase output
• CPC Class Codes: H02P 27/08 with pulse width modulation
• CPC Class Codes: H02P 29/02 Providing protection against overload without automatic interruption of supply protection against faults of stepper motors H02P8/36

Abstract

A method and apparatus for maintaining both a DC bus voltage and a motor current within limit values wherein, when a voltage limit condition occurs, a voltage error (i.e. DC bus voltage limit minus DC bus voltage) is used to increase an inverter output frequency until the voltage limit condition subsides, and, wherein during a current limit condition a current error signal (i.e. motor current limit minus motor current) is used to reduce inverter output frequency until the current limit condition subsides, a slew rate used to control the output frequency when neither a current nor a voltage limit condition exists, the slew rate decreased as a function of the voltage limit period durations and increases a function of the current limit period durations.

Claims

1. An apparatus for use with a system including a variable speed AC motor, a controller and an inverter, the inverter linked to and drawing direct current from a DC bus and linked to and supplying alternating current to the motor, the controller linked to the inverter and receiving and using an output frequency signal to control inverter frequency and thereby motor speed, the apparatus for regulating inverter frequency to maintain DC bus voltage and a supply line current amplitude below a voltage limit and a current limit, respectively, the apparatus comprising:

a DC bus voltage error determiner linked to the DC bus for generating a voltage error signal to indicate when the DC bus voltage exceeds a threshold voltage level, periods during which a voltage error signal is generated being voltage limit periods and other periods being non-limit periods;

a slew rate determiner for generating a decelerating slew rate signal, the slew rate being a rate of motor frequency change;

a selector linked to the error determiner and the rate determiner for selecting the error signal during limit periods and selecting the slew rate signal during non-limit periods for determining the inverter frequency; and

a modifier liked to the rate determiner for modifying the slew rate signal as a function of the durations of the limit and non-limit periods.

2. The apparatus of claim 1 wherein the modifier modifies by reducing a decelerating slew rate as a function of limit period durations and increasing the decelerating slew rate as a function of the non-limit periods.

3. The apparatus of claim 2 further including a current error determiner for generating a current error signal indicating when the motor current exceeds a threshold current level, periods when a current error signal are generated being current limit periods, during current limit periods when the voltage error determiner fails to generate a voltage error signal, the selector selecting the current error signal for determining the inverter frequency.

4. The apparatus of claim 3 wherein the slew rate determiner also generates an accelerating slew rate signal and the modifier modifies the accelerating slew rate as a function of the current limit periods.

5. The apparatus of claim 4 wherein the modifier modifies by reducing the accelerating slew rate as a function of the current limit periods and increasing the accelerating slew rate as a function of the non-current limit periods.

6. The apparatus of claim 5 wherein the voltage and current are periodically sampled and the modifier reduces the decelerating slew rate a predefined amount each sampling instant during a voltage limit period, increases the decelerating slew rate a predefined amount each sampling instant during a non-voltage limit period, increases the accelerating slew rate a predefined amount each sampling instant during a non-current limit period and decreases the accelerating slew rate a predefined among each sampling instant during a current limit period.

7. The apparatus of claim 1 wherein a maximum decelerating slew rate is specified and the modifier increases the decelerating slew rate only up to the maximum slew rate.

8. The apparatus of claim 6 wherein maximum accelerating and decelerating slew rates are specified and the modifier increases the decelerating slew rate only up to the maximum decelerating slew rate and increases the accelerating slew rate only up to the maximum accelerating slew rate.

9. The apparatus of claim 1 wherein the voltage error sensor includes a voltage sensor for sensing the DC bus voltage and generating a voltage signal, an anticipator for generating a voltage derivative which is the derivative of the voltage signal, a voltage summer for mathematically combining the voltage derivative and the voltage signal to generate a combined voltage signal and a comparator for comparing the combined voltage signal to the voltage threshold and, when the combined voltage signal is greater than the threshold, generating a voltage error signal.

10. The apparatus of claim 9 wherein the summer mathematically combines by adding.

11. The apparatus of claim 3 wherein the current error sensor includes a current sensor for sensing the line current amplitude and generating a current signal, an anticipator for generating a current derivative which is the derivative of the current signal, a current summer for mathematically combining the current derivative and the current signal to generate a combined current signal and a comparator for comparing the combined current signal to the current threshold and, when the combined current signal is greater than the threshold, generating a current error signal.

12. The apparatus of claim 11 wherein the summer mathematically combines by adding.

13. The apparatus of claim 3 wherein the voltage and current thresholds are the voltage and current limits, respectively.

14. A method for use with a system including a variable speed AC motor, a controller and an inverter, the inverter linked to and drawing direct current from a DC bus and linked to and supplying alternating current to the motor, the controller linked to the inverter and receiving and using an output frequency signal to control inverter frequency and thereby motor speed, the method for regulating inverter frequency to maintain DC bus voltage and a supply line current amplitude below a voltage limit and a current limit, respectively, the method comprising the steps of:

generating a voltage error signal to indicate when the DC bus voltage exceeds a threshold voltage level, periods during which a voltage error signal are generated being voltage limit periods and other periods being non-limit periods;

generating a decelerating slew rate signal, the slew rate being a rate of motor frequency change;

selecting the error signal during limit periods and selecting the slew rate signal during non-limit periods for determining the inverter frequency; and

modifying the slew rate signal as a function of the durations of the limit and non-limit periods.

15. The method of claim 14 wherein the step of modifying includes reducing a decelerating slew rate as a function of limit period durations and increasing the decelerating slew rate as a function of the non-limit periods.

16. The method of claim 15 further including the steps of generating a current error signal indicating when the motor current exceeds a threshold current level, periods when a current error signal are generated being current limit periods, during current limit periods when the voltage error determiner fails to generate a voltage error signal, selecting the current error signal for determining the inverter frequency.

17. The method of claim 16 wherein the step of generating a slew rate signal includes generating an accelerating slew rate signal and the step of modifying includes modifying the accelerating slew rate as a function of the current limit periods.

18. The method of claim 17 wherein the step of modifying the accelerating slew rate includes reducing the accelerating slew rate as a function of the current limit periods and increasing the accelerating slew rate as a function of the non-current limit periods.

19. The method of claim 18 wherein the controller includes voltage and current sensors which periodically sample the DC bus voltage and the motor current and wherein the step of modifying includes reducing the decelerating slew rate a predefined amount each sampling instant during a voltage limit period, increasing the decelerating slew rate a predefined amount each sampling instant during a non-voltage limit period, increasing the accelerating slew rate a predefined amount each sampling instant during a non-current limit period and decreasing the accelerating slew rate a predefined among each sampling instant during a current limit period.

20. The method of claim 14 wherein a maximum decelerating slew rate is specified and the step of modifying includes increasing the decelerating slew rate only up to the maximum slew rate.

21. The method of claim 17 wherein maximum accelerating and decelerating slew rates are specified and the step of modifying includes decelerating the slew rate only up to the maximum decelerating slew rate and increases the accelerating slew rate only up to the maximum accelerating slew rate.

22. An apparatus for use with a system including a variable speed AC motor, a controller and an inverter, the inverter linked to and drawing direct current from a DC bus and linked to and supplying alternating current to the motor, the controller linked to the inverter and receiving and using an output frequency signal to control inverter frequency and thereby motor speed, the apparatus for regulating inverter frequency to maintain DC bus voltage and a supply line current amplitude below a voltage limit and a current limit, respectively, the apparatus comprising:

a determiner means linked to the DC bus for generating a voltage error signal to indicate when the DC bus voltage exceeds a threshold voltage level, periods during which a voltage error signal are generated being voltage limit periods and other periods being non-limit periods;

a slew rate means for generating a decelerating slew rate signal, the slew rate being a rate of motor frequency change;

a selector means linked to the determiner means and the rate means for selecting the error signal during limit periods and selecting the slew rate signal during non-limit periods for determining the inverter frequency; and

a modifier means linked to the rate means for modifying the slew rate signal as a function of the durations of the limit and non-limit periods.

23. The apparatus of claim 22 wherein the modifier means modifies by reducing a decelerating slew rate as a function of limit period durations and increasing the decelerating slew rate as a function of the non-limit periods.

24. The apparatus of claim 23 further including a current error determiner means for generating a current error signal indicating when the motor current exceeds a threshold current level, periods when a current error signal are generated being current limit periods, during current limit periods when the voltage error determiner means fails to generate a voltage error signal, the selector means selecting the current error signal for determining the inverter frequency.

25. The apparatus of claim 24 wherein the slew rate determiner means also generates an accelerating slew rate signal and the modifier means modifies the accelerating slew rate as a function of the current limit periods.

26. The apparatus of claim 25 wherein the modifier means modifies by reducing the accelerating slew rate as a function of the current limit periods and increasing the accelerating slew rate as a function of the non-current limit periods.

27. The apparatus of claim 26 wherein maximum accelerating and decelerating slew rates are specified and the modifier means increases the decelerating slew rate only up to the maximum decelerating slew rate and increases the accelerating slew rate only up to the maximum accelerating slew rate.