Programmable low noise CMOS differentially voltage controlled logarithmic attenuator and method

• US 6,229,375 B1
• Filed: 08/18/1999
• Issued: 05/08/2001
• Est. Priority Date: 08/18/1999
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Koen, Myron J.
• Primary Examiner(s): LE, DINH THANH
• Application Number:
  US09/377,044
• Time in Patent Office: 629 Days
• Field of Search: 327/308, 327/350, 327/351, 327/306
• US Class Current: 327/351
• CPC Class Codes: H03G 1/0088 using discontinuously variable devices, e.g. switch-operated
• CPC Class Codes: H03G 7/001 without controlling loop H03G7/007, H03G7/02, H03G7/06 take precedence

Abstract

A logarithmically controlled attenuator circuit includes a resistive attenuator having a single series resistive element connected between an input conductor and an output conductor, and a plurality of parallel resistive elements each having a first terminal connected to the output conductor. A plurality of switching elements controllably couple the parallel resistive elements, respectively, between the output conductor and a first reference voltage conductor. A control circuit produces successive gradually increasing and then leveling off analog control signals on the control terminals of successive switching elements, respectively. A programmable implementation includes a first group of parallel resistive elements (Q1,3,5 . . . ) each having a first terminal connected to the output conductor (12), and a second group of parallel resistive elements (Q2,4,6 . . . ) each having a first terminal connected to the output conductor (12).

Claims

1. A logarithmic attenuator circuit comprising:

(a) a resistive attenuator including

I. an input conductor and an output conductor,

ii. a single series resistive element connected between the input conductor and the output conductor, and

iii. a plurality of successive parallel controllable resistive elements each having a control terminal and each also having a first terminal connected to the output conductor; and

(b) a control circuit producing a plurality of successive gradually increasing and then leveling off analog control signals on the control terminals, respectively, so as to change the controllable resistive elements from being at the edge of conduction to being fully on in response to gradual linear changing of an analog gain control signal from a first value to a second value, wherein fully on resistances of the successive parallel controllable resistive elements decrease progressively.

2. The logarithmic attenuator circuit of claim 1 wherein the resistances of the successive parallel resistive elements decrease exponentially.

3. The logarithmic attenuator circuit of claim 1 wherein the single series resistive element includes a MOSFET having its gate connected to a second reference voltage conductor.

4. The logarithmic attenuator of claim 3 wherein each parallel resistive element includes a MOSFET that also functions as the switching element coupling the parallel resistive element between the output conductor and the first reference voltage conductor.

5. The logarithmic attenuator of claim 1 wherein the control circuit includes a plurality of differential amplifiers each having a first input coupled to receive a corresponding gain control signal, respectively, on a corresponding gain control conductor and a second input, and a circuit producing a plurality of successive threshold voltages each having a larger magnitude than the previous one, the second inputs being coupled to receive the plurality of threshold voltages, respectively.

6. The logarithmic attenuator of claim 4 wherein the control circuit includes a plurality of differential amplifiers each having a first input coupled to receive a corresponding gain control signal on a corresponding gain control conductor and a second input, and a circuit producing a plurality of successive threshold voltages each having a larger magnitude than the previous one, the second inputs being coupled to receive the plurality of threshold voltages, respectively.

7. The logarithmic attenuator of claim 6 wherein each differential amplifier includes an output stage bias control circuit that maintains an output of that differential amplifier at a voltage approximately equal to a threshold voltage of a MOSFET functioning as a parallel resistive element and as a switching element if the magnitude of the gain control voltage is less than or equal to the magnitude of the threshold voltage applied to the second input of the differential amplifier.

8. The logarithmic amplifier of claim 4 wherein all of the MOSFETs are P-channel MOSFETs each having a source electrode connected to a body electrode.

9. A logarithmic attenuator circuit comprising;

(a) a first resistive attenuator including

I. a first input conductor and a first output conductor,

ii. a first single series resistive element connected between the first input conductor and the first output conductor, and

iii a first group of successive parallel controllable resistive elements each having a control terminal and each also having a first terminal connected to the first output conductor;

(b) a second resistive attenuator including

I. a second input conductor and a second output conductor,

ii. a second single series resistive element connected between the second input conductor and the second output conductor, and

iii. a second group of successive parallel controllable resistive elements each having a control terminal and each also having a first terminal connected to the second output conductor;

(c) a control circuit producing a plurality of successive gradually increasing and then leveling off analog control signals on the control terminals of successive controllable resistive elements of the first and second groups, respectively, so as to change the controllable resistive elements from being at the edge of condition to being fully on in response to gradual linear changing of an analog gain control signal from a first value to a second value, wherein fully on resistances of the successive parallel controllable resistive elements decrease progressively.

10. A logarithmic gain circuit comprising:

(a) an attenuator including

I. an input conductor and an output conductor,

ii. a single series impedance element connected between the input conductor and the output conductor, and

iii. a plurality of successive parallel controllable impedance elements each having a control terminal and each also having a first terminal connected to the output conductor,

(b) an analog control circuit producing a plurality of successive control signals on the control terminals of successive controllable impedance elements, respectively, so as to change the controllable impedance elements from being at the edge of conduction to being fully on in response to linear changing of an analog gain control signal from a first value to a second value, a magnitude of each control signal gradually increasing and then leveling off at a predetermined value, wherein fully on impedance of the successive parallel controllable impedance elements decrease progressively.

11. A logarithmic gain circuit comprising:

(a) a resistive attenuator including

I. an input conductor and an output conductor,

ii a single series resistive element connected in series between the input conductor and the output conductor, and

iii. a plurality of parallel successive resistive elements each having a first terminal connected to the output conductor, each of the parallel resistive elements including an electrically controllable resistive element having a control terminal operative to control the resistance thereof, each of the parallel resistive elements including a second terminal coupled to a common conductor; and

(b) an analog control circuit producing a plurality of successive piecewise-linear gradually changing analog control voltage signals on the control terminals of successive electrically controllable resistive elements, respectively, so as to change the electrically controllable resistive elements form being at the edge of conduction to being fully on in response to gradual changing of an analog gain control signal from a first value to a second value, wherein fully on resistances of the electrically controllable resistive elements of the successive parallel resistive elements decrease progressively.

12. A logarithmic amplifier circuit comprising:

(a) an operational amplifier having an inverting input, a non-inverting input, and an output;

(b) a logarithmic attenuator having an input coupled to the output of the operational amplifier and an output coupled to the inverting input of the operational amplifier, the logarithmic attenuator including

(1) a resistive attenuator including

I. an input conductor and an output conductor,

ii. a single series resistive element connected between the input conductor and the output conductor, and

iii. a plurality of successive parallel resistive elements each having a first terminal connected to the output conductor, each of the successive parallel resistive elements including an electrically controllable resistive element having a control terminal operative to control the resistance thereof, each of the parallel resistive elements including a second terminal coupled to a common conductor; and

(2) an analog control circuit producing a plurality of successive piecewise-linear gradually changing analog control voltage signals on the control terminals of successive electrically controllable resistive elements, respectively, so as to change the electrically controllable resistive element from being at the edge of conduction to being fully on in response to gradual changing of an analog gain control signal from a first value to a second value, wherein fully on resistances of the electrically controllable resistive elements of the successive parallel resistive elements decrease progressively.

13. A logarithmic amplifier circuit comprising:

(a) first and second amplifiers each having an input and an output;

(b) a logarithmic attenuator having an input coupled to the output of the first amplifier and an output coupled to the input of the second amplifier, the logarithmic attenuator including

(1) a resistive attenuator including

I. an input conductor and an output conductor,

ii. a single series resistive element connected between the input conductor and the output conductor, and

iii. a plurality of successive parallel resistive elements each having a first terminal connected to the output conductor, each of the parallel resistive elements including an electrically controllable resistive element having a control terminal operative to control the resistance thereof, each of the parallel resistive elements including a second terminal coupled to a common conductor; and

(2) an analog control circuit producing a plurality of successive piecewise-linear gradually changing analog control voltage signals on the control terminals of successive electrically controllable resistive elements, respectively, so as to change the electrically controllable resistive elements from being at the edge of conduction to being fully on in response to gradual changing of an analog gain control signal from a first value to a second value, wherein fully on resistance of the electrically controllable resistive elements of the successive parallel resistive elements.

14. A method of operating a circuit to provide a logarithmically controlled gain, comprising:

(a) providing a resistive attenuator including an input conductor and an output conductor, a single series resistive element connected between the input conductor and the output conductor, and a plurality of successive parallel resistive elements each having a first terminal connected to the output conductor, each of the successive parallel resistive elements including an electrically controllable resistive element having a control terminal operative to control the resistance thereof, each of the parallel resistive elements including a second terminal coupled to a common conductor; and

(b) producing a plurality of gradually changing successive piecewise-linear analog control voltage signals on the control terminals of successive electrically controllable resistive elements, respectively, so as to change the electrically controllable resistive elements from being at the edge of conduction to being fully on, wherein fully on resistive of the electrically controllable resistive elements of the successive parallel resistive elements decrease progressively.

15. The method of claim 14 wherein step (b) includes producing the plurality of successive piece-wise linear analog control voltage signals in response to gradual linear changing of an analog gain control signal from a first value to a second value.

16. A programmable logarithmic attenuator circuit comprising:

(a) a resistive attenuator including

I. an input conductor and an output conductor,

ii. a single series resistive element connected between the input conductor and the output conductor,

iii. a first group of parallel electrically controllable resistive elements each having a control terminal and each also having a first terminal connected to the output conductor, and

iv. a second group of parallel electrically controllable resistive elements each having a first terminal connected to the output conductor;

(b) a first gain control conductor coupled to the control terminal of each of the electrically controllable resistive elements of the first group, and a second gain control conductor coupled to the control terminal of each of the electrically controllable resistive elements of the second group, to control a gain of the programmable logarithmic attenuator circuit by turning on any selected combination of the electrically controllable resistive element of the first group, or the electrically controllable resistive elements of the second group; and

(c) a control circuit producing a plurality of successive gradually increasing and then leveling off analog control signals on the control terminals of successive ones of the electrically controllable resistive elements, respectively, so as to change the electrically controllable resistive elements from being at the edge of conduction to being fully on in response to gradual linear changing of an analog gain control signal from a first value to a second value, wherein fully on resistances of the successive electrically controllable resistive elements decrease progressively.

17. A differential logarithmic attenuator circuit comprising:

(a) a first resistive attenuator including

I. a first input conductor and a first output conductor,

ii. a single series resistive element connected between the first input conductor and the first output conductor, and

iii. a first group of parallel electrically controllable resistive elements each having a control terminal and each also having a first terminal connected to the output conductor;

(b) a second resistive attenuator including

I. a second input conductor and a second output conductor,

ii. a single series resistive element connected between the second input conductor and the second output conductor, and

iii. a second group of parallel electrically controllable resistive elements each having a control terminal aid each also having a first terminal connected to the second output conductor;

(c) a control circuit producing a plurality of successive gradually increasing and then leveling off analog control signals on the control terminals of successive ones of the electrically controllable resistive elements, respectively, so as to change the electrically controllable resistive elements from being at the edge of conduction to being fully on in response to gradual linear chancing of an analog gain control signal from a first value to a second value, wherein fully on resistance of the successive electrically controllable resistive elements decrease progressively.

18. The differential logarithmic attenuator circuit of claim 17 including a low noise differential amplifier having first and second inputs coupled to the first and second output conductors, respectively, the low noise differential amplifier including

(1) a differential stage including

i. first and second load devices coupled between a first reference voltage and first and second conductors, respectively,

ii. a resistor,

iii. a first input transistor having a first electrode coupled to the first conductor, and a second electrode coupled by a third conductor to a first terminal of the resistor, and a second input transistor having a first electrode coupled to the second conductor, and a second electrode coupled by a fourth conductor to a second terminal of the resistor,

iv. a first current source coupled to provide a first bias current, and a second current source coupled to provide a second bias current;

(2) a first feedback amplifier including a third input transistor coupled between the third conductor and the first current source and having a gate electrode coupled to the first output conductor, the first feedback amplifier producing a first signal on the control electrode of the first input transistor of the differential stage, the first bias current flowing through the first load device, the first input transistor, the third input transistor, and the first current source; and

(3) a second feedback amplifier including a fourth input transistor coupled between the fourth conductor and the second current source and having a gate electrode coupled to the second output conductor, the second feedback amplifier producing a second signal on the control electrode of the second input transistor, the second bias current flowing through the second load device, the second input transistor, the fourth input transistor, and the second current source.

19. The differential logarithmic attenuator circuit of claim 17 including a low noise differential amplifier having first and second outputs coupled to the first input conductor and the second input conductor, respectively, the low noise differential amplifier including

(1) a differential stage including

i. first and second load devices coupled between a first reference voltage and first and second conductors, the first conductor being coupled to the first input conductor, and the second conductor being coupled to the second input conductor, respectively,

ii. a resistor,

iii. a first input transistor having a first electrode coupled to the first conductor and a second electrode coupled by a third conductor to a first terminal of the resistor, and a second input transistor having a first electrode coupled to the second conductor and a second electrode coupled by a fourth conductor to a second terminal of the resistor,

iv. a first current source coupled to provide a first bias current, and a second current source coupled to provide a second bias current;

(2) a first feedback amplifier including a third input transistor coupled between the third conductor and the first current source and having a gate electrode coupled to receive a first input signal, the first feedback amplifier producing a first signal on the control electrode of the first input transistor of the differential stage, the first bias current flowing through the first load device, the first input transistor, the third input transistor, and the first current source; and

(3) a second feedback amplifier including a fourth input transistor coupled between the fourth conductor and the second current source and having a gate electrode coupled to receive a second input signal, the second feedback amplifier producing a second signal on the control electrode of the second input transistor, the second bias current flowing through the second load device, the second input transistor, the fourth input transistor, and the second current source.

20. The differential logarithmic attenuator circuit of claim 17 including first and second low noise differential amplifiers, the first low noise differential amplifier including

(1) a first differential stage including

i. first and second load devices coupled between a first reference voltage and first and second conductors, respectively,

ii. a first resistor,

iii. a first input transistor having a first electrode coupled to the first conductor, and a second electrode coupled by a third conductor to a first terminal of the first resistor, and a second input transistor having a first electrode coupled to the second conductor, and a second electrode coupled by a fourth conductor to a second terminal of the first resistor,

iv. a first current source coupled to provide a first bias current, and a second current source coupled to provide a second bias current;

(2) a first feedback amplifier including a third input transistor coupled between the third conductor and the first current source and having a gate electrode coupled to the first output conductor, the first feedback amplifier producing a first signal on the control electrode of the first input transistor of the differential stage, the first bias current flowing through the first load device, the first input transistor, the third input transistor, and the first current source; and

(3) a second feedback amplifier including a fourth input transistor coupled between the fourth conductor and the second current source and having a gate electrode coupled to the second output conductor, the second feedback amplifier producing a second signal on the control electrode of the second input transistor, the second bias current flowing through the second load device, the second input transistor, the fourth input transistor, and the second current source,

the second low noise differential amplifier including

(1) a second differential stage including

i. third and fourth load devices coupled between the first reference voltage and fifth and sixth conductors, the fifth conductor being coupled to the first input conductor, and the sixth conductor being coupled to the second input conductor, respectively,

ii. a second resistor,

iii. a fifth input transistor having a first electrode coupled to the fifth conductor and a second electrode coupled by a seventh conductor to a first terminal of the second resistor, and a sixth input transistor having a first electrode coupled to the sixth conductor and a second electrode coupled by an eighth conductor to a second terminal of the second resistor,

iv. a third current source coupled to provide a third bias current, and a fourth current source coupled to provide a fourth bias current;

(2) a third feedback amplifier including a seventh input transistor coupled between the seventh conductor and the third current source and having a gate electrode coupled to receive a first input signal, the third feedback amplifier producing a third signal on the control electrode of the fifth input transistor of the second differential stage, the first bias current flowing through the third load device, the fifth input transistor, the seventh input transistor, and the third current source; and

(3) a fourth feedback amplifier including an eighth input transistor coupled between the eighth conductor and the fourth current source and having a gate electrode coupled to receive a second input signal, the fourth feedback amplifier producing a fourth signal on the control electrode of the sixth input transistor, the second bias current flowing through the fourth load device, the sixth input transistor, the eighth input transistor, and the fourth current source.

21. A method of operating a circuit to provide programmable logarithmically controlled attenuation, comprising:

(a) providing a resistive attenuator including an input conductor and an output conductor, a single series resistive element connected between the input conductor and the output conductor, a first group of parallel electrically controllable resistive elements each having a first terminal connected to the output conductor, each having a control terminal, and a second group of parallel her electrically controllable resistive elements each having a first terminal connected to the output conductor, each having a control terminal;

(b) applying a first gain control signal to the control terminal of each of the electrically controllable resistive elements of the first group, and a second gain control signal to the control terminal of each of the electrically controllable resistive elements of the second group to select the attenuation by turning on to a predetermine degree any selected combination of the electrically controllable resistive elements of the first group, the electrically controllable resistive elements of the second group; and

(c) producing a plurality of successive gradually increasing and then leveling off analog control signals on the control terminals of successive ones of the electrically controllable resistive elements, respectively, so as to change the controllable resistive elements from being at the edge of conduction to being fully on in response to gradual linear changing of an analog gain control signal from a first value to a second value.