Active matrix light emitting diode pixel structure and concomitant method

• US 6,229,508 B1
• Filed: 09/28/1998
• Issued: 05/08/2001
• Est. Priority Date: 09/29/1997
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Chemical Corporation (Mitsubishi Chemical Group Corp.), MEC Management, LLC (Three Affiliated Tribes of the Fort Berthold Reservation, North Dakota), Transpacific Infinity LLC
• Original Assignee: Sarnoff Corporation (SRI International, Inc.)
• Inventors: Kane, Michael Gillis
• Primary Examiner(s): Hjerpe, Richard
• Assistant Examiner(s): Nguyen, Kevin M.
• Application Number:
  US09/161,862
• Time in Patent Office: 953 Days
• Field of Search: 345/82, 345/83, 345/44, 345/46, 345/78, 345/204, 345/91, 345/92, 345/205, 345/206
• US Class Current: 345/82
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2300/089 Pixel comprising a non-linear two-terminal element in series with each display pixel element, the series comprising also other elements
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0254 Control of polarity reversal in general, other than for liquid crystal displays
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2320/02 Improving the quality of display appearance
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/0238 Improving the black level
• CPC Class Codes: G09G 2320/0285 using tables for spatial correction of display data
• CPC Class Codes: G09G 2320/029 by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
• CPC Class Codes: G09G 2320/0295 by monitoring each display pixel
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2360/145 the light originating from the display screen
• CPC Class Codes: G09G 2360/16 Calculation or use of calculated indices related to luminance levels in display data
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3291 : in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

LED pixel structures and methods that improve brightness uniformity by reducing current nonuniformities in a light-emitting diode of the pixel structures are disclosed.

Claims

1. A display comprising at least one pixel, said pixel comprising:

a first transistor having a gate, a source and a drain, where said gate is for coupling to a first select line;

a capacitor having a first and second terminals, where said drain of said first transistor is coupled to said first terminal of said capacitor;

a second transistor having a gate, a source and a drain, where said drain of said first transistor is coupled to said drain of said second transistor, where said gate of said second transistor is for coupling to an autozero line;

a third transistor having a gate, a source and a drain, where said source of said third transistor is coupled to said drain of said second transistor, where said gate of said third transistor is for coupling to a second select line;

a fourth transistor having a gate, a source and a drain, where said drain of said fourth transistor is coupled to said source of said second transistor, where said gate of said fourth transistor is coupled to said source of said first transistor;

a fifth transistor having a gate, a source and a drain, where said drain of said fifth transistor is coupled to said drain of said third transistor, where said gate of said fifth transistor is coupled to said source of said first transistor; and

a light element having two terminals, where said source of said fourth transistor and said source of said fifth transistor are coupled to one of said terminal of said light element.

2. The display of claim 1, wherein said light element is an organic light emitting diode (OLED).

3. The display of claim 1, wherein said transistors are thin film transistors constructed from amorphous-silicon.

4. The display of claim 1, wherein said second select line is an autozero line from a previous row.

5. A display comprising at least one pixel, said pixel comprising:

a first transistor having a gate, a source and a drain, where said gate is for coupling to a first select line;

a capacitor having a first and second terminals, where said drain of said first transistor is coupled to said first terminal of said capacitor;

a second transistor having a gate, a source and a drain, where said source of said first transistor is coupled to said source of said second transistor, where said gate of said second transistor is for coupling to an autozero line;

a third transistor having a gate, a source and a drain, where said source of said third transistor is coupled to said drain of said second transistor, where said gate of said third transistor is for coupling to a second select line;

a fourth transistor having a gate, a source and a drain, where said drain of said fourth transistor is coupled to said source of said third transistor, where said gate of said fourth transistor is coupled to said source of said first transistor;

a fifth transistor having a gate, a source and a drain, where said drain of said fifth transistor is coupled to said drain of said third transistor, where said gate of said fifth transistor is coupled to said source of said first transistor; and

a light element having two terminals, where said source of said fourth transistor and said source of said fifth transistor are coupled to one of said terminal of said light element.

6. The display of claim 5, wherein said light element is an organic light emitting diode (OLED).

7. The display of claim 5, wherein said second select line is an autozero line from a previous row.

8. A system comprising:

a display controller; and

a display, coupled to said display controller, where said display comprises a plurality of pixels, where each pixel comprises;

a first transistor having a gate, a source and a drain, where said gate is for coupling to a first select line;

a capacitor having a first and second terminals, where said drain of said first transistor is coupled to said first terminal of said capacitor;

a second transistor having a gate, a source and a drain, where said source of said first transistor is coupled to said source of said second transistor, where said gate of said second transistor is for coupling to an autozero line;

a third transistor having a gate, a source and a drain, where said source of said third transistor is coupled to said drain of said second transistor, where said gate of said third transistor is for coupling to a second select line;

a fourth transistor having a gate, a source and a drain, where said drain of said fourth transistor is coupled to said source of said third transistor, where said gate of said fourth transistor is coupled to said source of said first transistor;

a fifth transistor having a gate, a source and a drain, where said drain of said fifth transistor is coupled to said drain of said third transistor, where said gate of said fifth transistor is coupled to said source of said first transistor; and

a light element having two terminals, where said source of said fourth transistor and said source of said fifth transistor are coupled to one of said terminal of said light element.

9. A system comprising:

a display controller; and

a display, coupled to said display controller, where said display comprises a plurality of pixels, where each pixel comprises;

a first transistor having a gate, a source and a drain, where said gate is for coupling to a first select line;

a capacitor having a first and second terminals, where said drain of said first transistor is coupled to said first terminal of said capacitor;

a second transistor having a gate, a source and a drain, where said drain of said first transistor is coupled to said drain of said second transistor, where said gate of said second transistor is for coupling to an autozero line;

a third transistor having a gate, a source and a drain, where said source of said third transistor is coupled to said drain of said second transistor, where said gate of said third transistor is for coupling to a second select line;

a fourth transistor having a gate, a source and a drain, where said drain of said fourth transistor is coupled to said source of said second transistor, where said gate of said fourth transistor is coupled to said source of said first transistor;

a fifth transistor having a gate, a source and a drain, where said drain of said fifth transistor is coupled to said drain of said third transistor, where said gate of said fifth transistor is coupled to said source of said first transistor; and

a light element having two terminals, where said source of said fourth transistor and said source of said fifth transistor are coupled to one of said terminal of said light element.