Display a driving circuit and a driving method thereof

• US 6,229,516 B1
• Filed: 12/30/1996
• Issued: 05/08/2001
• Est. Priority Date: 12/30/1995
• Status: Expired due to Term

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Dong-Gyu, Hu, Jung-Min, Kim, Sang-Soo, Lee, Seung-Jun, Kim, Tae-Sung
• Primary Examiner(s): Hjerpe, Richard A.
• Assistant Examiner(s): Tran, Henry N.
• Application Number:
  US08/774,523
• Time in Patent Office: 1,590 Days
• Field of Search: 345/55, 345/98, 345/204, 345/80, 345/51, 345/99, 345/100, 345/103, 345/213, 345/515, 345/516, 345/517, 340/758
• US Class Current: 345/103
• CPC Class Codes: G09G 2310/0281 Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 3/3666 with the matrix divided into sections

Abstract

Two gate lines are applied with scanning signals simultaneously. The period of the scanning signal and the image signal being read from a frame memory is twice that of the image signal being written into a frame memory or that of the scanning signal of a conventional art. Therefore, the time for applying the image signal to the pixels increase twice. In addition, the image signals in a frame are continuously applied into the first row pixels to the last row pixels, and thus each row pixels have the same driving conditions.

Claims

1. A circuit for driving an active matrix display including a plurality of pixels having switching elements, a plurality of first and second scanning lines and a plurality of first and second data lines, wherein the second data lines are located under the first data lines as a whole, the first and second data lines are coupled to the pixels via the switching elements and are disconnected from each other, and the first and the second scanning lines are respectively connected to the switching elements connected to the first and the second data lines, the circuit comprising:

a signal supplier for supplying scanning signals to one of the first scanning lines and one of the second scanning lines; and

a data supplier for simultaneously supplying image data to the first and second data lines,

wherein the scanning signals are respectively applied from uppermost lines of the first and the second scanning lines to lowermost lines of the first and the second scanning lines in sequence, and the scanning signal for the uppermost scanning line of the second scanning lines is applied immediately after the application of the scanning signal to the lowermost scanning lines of the first scanning line is finished.

2. The circuit of claim 1, wherein the signal supplier supplies first and second scanning signals, and wherein the signal supplier supplies an initial second scanning signal to an uppermost scanning line among the second scanning lines immediately after supplying a final first scanning signal to a lowermost scanning line among the first scanning lines.

3. The circuit of claim 2, wherein the scanning signals are applied to the one of the first scanning lines and the one of the second scanning lines at the same time.

4. A method for driving a matrix type display having a plurality of pixels arranged in a matrix type, each pixel connected to one of a plurality of scanning lines and one of a plurality of image signal lines, by applying scanning signals and image data to the pixels through the scanning lines extending in a transverse direction and the image signal lines extending in a longitudinal direction, respectively, wherein the scanning lines are divided into upper scanning lines and lower scanning lines, the image signal lines are divided into upper image signal lines and lower image signal lines, and the upper image signal lines and the lower image signal lines are disconnected from each other, the method comprising:

applying an upper scanning signal through the upper scanning lines connected to corresponding upper pixels;

applying upper image data to the corresponding upper pixels through the upper image signal lines simultaneously;

applying a lower scanning signal through the lower scanning lines connected to corresponding lower pixels;

applying lower image data to the corresponding lower pixels through the lower image signal lines simultaneously,

wherein the scanning signals are respectively applied from uppermost lines of the first and the second scanning lines to lowermost lines of the first and the second scanning lines in sequence, and the scanning signal for the uppermost scanning line of the second scanning lines is applied immediately after the application of the scanning signal to the lowermost scanning lines of the first scanning line is finished.

5. The method of claim 4, wherein the upper and lower scanning signals are applied at the same time.

6. The method of claim 4, further comprising:

writing the upper image data corresponding to upper pixels connected to the upper scanning lines into a memory at a first speed;

writing lower image data corresponding to lower pixels connected to the lower scanning lines into the memory at the first speed;

supplying the scanning signals to the upper scanning lines in sequence, responsive to a first start signal;

supplying the scanning signals to the lower scanning lines in sequence, responsive to a second start signal;

reading the image data corresponding to the upper and lower pixels connected to the upper and lower scanning lines that are being supplied with the scanning signals, at a second speed from the memory in sequence; and

applying the read image data to the corresponding pixels through the image signal lines,

wherein the second speed is half of the first speed.