Power amplifying circuitry for wireless radio transceivers

• US 6,230,031 B1
• Filed: 02/18/1999
• Issued: 05/08/2001
• Est. Priority Date: 03/31/1997
• Status: Expired due to Term

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: OKI Telecom, Inc. (OKI Electric Industry Company Limited)
• Inventors: Barber, Clifton J.
• Primary Examiner(s): Chang, Vivian
• Assistant Examiner(s): APPIAH, CHARLES NANA
• Application Number:
  US09/251,756
• Time in Patent Office: 810 Days
• Field of Search: 455/99, 455/557, 455/571, 455/553, 455/126, 455/127, 455/90, 455/69, 455/88, 455/551
• US Class Current: 455/571
• CPC Class Codes: H01Q 1/242 specially adapted for hand-held use
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/3877 Arrangements for enabling portable transceivers to be used in a fixed position, e.g. cradles or boosters
• CPC Class Codes: H04B 2001/0408 with power amplifiers

Abstract

A system for amplifying output transmitted power of a mobile battery powered radio transceiver includes a secondary voltage source, multiple power amplifiers, a central processing unit to control the amplification of the output transmitted signal, and a switch to detect the presence of the radio transceiver. The system includes a method for compensating for the signal loses associated with cabling used in the installation of the amplifying circuitry in an automobile application. According to the first preferred embodiment of the present invention, the method for compensating for signal losses is a manually configured bank of switches. When the amplifying circuitry is installed in the automobile application, the bank of switches is set to specify the amount of loss compensation needed. Multiple amplifiers are used for amplification of the output transmitted signal when the radio transceiver is operating at different frequencies. Gain of the amplifying circuitry remains fixed and the central processing unit will control the output of the portable transceiver, therefore changing the input level into the amplifying circuitry and hence the output level of the amplifying circuitry.

Claims

1. A power amplifying circuit comprising:

a first means for amplifying, coupled to a first voltage source, for amplifying a radio frequency (RF) signal from a hand held radio transmitter to produce an output RF signal; and

a first means for maintaining the magnitude of said output RF signal at a selected one of a first set of levels,

wherein said power amplifying circuit is couplable to a second means for amplifying, coupled to a second voltage source, for amplifying said output RF signal to form an amplified output RF signal, and a second means for maintaining said amplified output RF signal at a fixed gain level, said second voltage source providing a voltage having a magnitude greater than the magnitude of the voltage provided by said first voltage source, said power amplifying circuit further comprising;

a means for detecting the presence of said second amplifying means;

a means for adding, upon detection of said second amplifying means, two levels to the first set of levels, the two levels being lower in magnitude than a lowest level in the first set of levels, the first set of levels and the two levels lower in magnitude together defining a second set of levels;

a means for selecting a predetermined one of the second set of levels when said second amplifying means is detected; and

a means for applying said fixed gain level, said fixed gain level having a magnitude greater than the magnitude of any level of the first set of levels and the second set of levels, to said second maintaining means.

2. The power amplifying circuit of claim 1, wherein said 2 levels is an 8 dB linear gain.

3. The power amplifying circuit of claim 1, further comprising a means for holding said hand held radio transceiver in a rest mode, wherein said means for detecting is located within said means for holding and detects the presence of said hand held radio transceiver upon said hand held radio transceiver being in said rest mode.

4. The power amplifying circuit of claim 3, wherein said means for holding is connected to said second means for amplifying via a cable.

5. The power amplifying circuit of claim 4, wherein said first amplifying circuit further comprises an adjustment circuit, said adjustment circuit comprising;

at least one memory location located within a CPU, said set of memory locations pre-set with power loss compensation values;

at least one means for selecting between said at least one memory location according to power loss associated with said power amplifying circuitry; and

a means for adding said power loss compensation values selected by said means for selecting.

6. The power amplifying circuit of claim 1, wherein said second means for amplifying further comprises a first amplifying circuit and a second amplifying circuit.

7. The power amplifying circuit of claim 6, wherein said first amplifying circuit operates at 800 megahertz and said second amplifying circuit operates at 1.9 gigahertz.