Factory mode free setting apparatus and method thereof

• US 6,230,063 B1
• Filed: 02/01/2000
• Issued: 05/08/2001
• Est. Priority Date: 07/07/1995
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Ji-Young
• Primary Examiner(s): Cuchlinski, Jr., William A.
• Assistant Examiner(s): Marc, McDieunel, Marc, McDieunel
• Application Number:
  US09/495,117
• Time in Patent Office: 462 Days
• Field of Search: 700/83, 345/508, 345/511, 455/12.1, 455/569, 455/67.3, 455/20, 358/1.6, 358/1.17, 358/1.18, 324/601
• US Class Current: 700/83
• CPC Class Codes: G09G 1/165 Details of a display terminal using a CRT, the details relating to the control arrangement of the display terminal and to the interfaces thereto details suitable for both CRT and flat panel G09G5/003; specific for a flat panel G09G3/2092
• CPC Class Codes: G09G 2320/06 Adjustment of display parameters
• CPC Class Codes: G09G 2320/08 Arrangements within a display terminal for setting, manually or automatically, display parameters of the display terminal
• CPC Class Codes: G09G 2370/04 Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
• CPC Class Codes: H04N 17/04 for receivers

Abstract

A technique for collectively setting a factory mode of operation of a monitor offers adjustments or modifications for particulars of mode data to meet user requirements, by transmitting a set of factory mode timing data from an external controller to an electrically erasable programmable read only memory using a serial interface data communication. A factory mode data transmission process includes the steps of transmitting a start data signal to a microcomputer in a monitor when a storage key input is fed to the external controller, repeatedly sending the timing data until a mode end signal is input and sending a mode end data to the microcomputer when a mode end signal is input. In addition, a factory mode data receiving process includes the steps of sending back the start data received to the external controller, storing mode timing data received into a factory mode address reserved in a memory in the monitor and ending the reception of mode timing data when mode end data is inputted. Consequently, any operation mode according to user requirements is able to be set in a monitor, without modifying a pre-installed program in a microcomputer housed therein, at a low cost.

Claims

1. An apparatus for setting factory mode of operation in a display apparatus, comprising:

an external controller disposed outside of said display apparatus, having a keyboard, an external microprocessor connected to said keyboard and receiving modified factory mode data from said keyboard, and an external memory connected to said external microprocessor and receiving and storing said modified factory mode data from said external microprocessor;

a main microprocessor disposed within said display apparatus, connected to said external microprocessor and receiving said modified factory mode data transmitted from said external controller;

a main memory disposed within said display apparatus, connected to said main microprocessor, having a factory mode address and a user mode address, storing initial factory mode data in said factory mode address and user mode data in said user mode address, deleting said initial factory mode data and storing said modified factory mode data received from said external controller into said factory mode address; and

a video stage coupled to said main microprocessor, receiving one of said modified factory mode data and said user mode data, driving a screen representing said one of said modified factory mode data and said user mode data.

2. The apparatus of claim 1, with said main microprocessor comprised of a plurality of chip select ports, a first clock signal port and a first data signal port receiving said modified factory mode data from said external controller.

3. The apparatus of claim 2, with said main microprocessor transmitting said modified factory mode to said main memory through said first data signal port.

4. The apparatus of claim 1, with said main microprocessor comprised of a plurality of chip select ports, a first clock signal port and a first data signal port receiving said modified factory mode data from said external controller, transmitting said modified factory mode to said main memory through said first data signal port.

5. The apparatus of claim 4, with main memory coupled to first one of said chip select ports, having a second clock signal port coupled to said first clock signal port and a second data signal port coupled to said first data signal port, storing said modified factory mode data in said factory mode address in response to said first chip select port of said microprocessor.

6. The apparatus of claim 5, further comprised of a transmitter coupled to said external controller, transmitting said modified factory mode data stored in said external memory to said microprocessor.

7. The apparatus of claim 6, with said transmitter comprised of a third clock signal port and a third data signal port connected to said first clock signal port and a first data signal port of said main microprocessor respectively.

8. The apparatus of claim 5, with said external microprocessor comprised of a third clock signal port and a third data signal port connected to said first clock signal port and a first data signal port of said main microprocessor respectively.

9. The apparatus of claim 4, with said video stage coupled to said second one of said chip select ports, said clock port and said data signal port of said microprocessor, receiving one of said modified factory mode data and said user mode data, driving a screen representing said one of said modified factory mode data and said user mode data.

10. The apparatus of claim 1, with said main microprocessor comprised of an inter-integrated circuit bus communication protocol with a first clock signal port and a first data signal port and a serial data communication connected to said external microprocessor.

11. The apparatus of claim 1, with said main microprocessor comprised of an inter-integrated circuit bus communication protocol with a first clock signal port and a first data signal port connected to a second clock signal port and a second data signal port of said main memory.

12. The apparatus of claim 1, with said main microprocessor comprised of a buffer memory disposed between said external microprocessor and said microprocessor.

13. An apparatus for setting factory mode data in a display apparatus, comprising:

a main microprocessor disposed within said display apparatus, receiving modified factory mode data transmitted from an external device disposed outside of said display apparatus, comprised of a plurality of chip select ports, a first clock signal port and a first data signal port;

a main memory disposed within said display apparatus, having a factory mode address and a user mode address, storing initial factory mode data in said factory mode address and user mode data in said user mode address, coupled to first one of said chip select ports, having a second clock signal port coupled to said first clock signal port and a second data signal port coupled to said first data signal port, storing said modified factory mode data in said factory mode address in response to said first chip select port of said microprocessor, and

a video stage coupled to said main microprocessor, receiving one of said modified factory mode data and said user mode data, driving a screen representing said one of said modified factory mode data and said user mode data.

14. The apparatus of claim 13, with said video stage coupled to said second one of said chip select ports, said clock port and said data signal port of said microprocessor, receiving one of said modified factory mode data and said user mode data, driving a screen representing said one of said modified factory mode data and said user mode data.

15. The apparatus of claim 13, with said main microprocessor comprised of an inter-integrated circuit bus communication protocol with said first clock signal port and said first data signal port and a serial data communication connected to said external device.

16. The apparatus of claim 13, with said microprocessor comprised of an inter-integrated circuit bus communication protocol with said first clock signal port and said first data signal port accommodating bidirectional transmission of timing data signals in synchronization with clock signals present at said first clock signal port.

17. The apparatus of claim 13, with said main microprocessor comprised of a serial data communication protocol with a data reception port and a data transmission port respectively accommodating reception and transmission of timing signals by said microprocessor.

18. The apparatus of claim 13, with said main microprocessor comprised of a plurality of buffer memories connected to said first clock signal port and said first data signal port, storing communication data received from said external device.

19. The apparatus of claim 13, with said external device comprised of a keyboard, an external microprocessor connected to said key board and receiving modified factory mode data from said keyboard, and an external memory connected to said external microprocessor and receiving and storing a modified factory mode data from said external microprocessor, transmitting said modified factory mode data stored in said external memory.

20. The apparatus of claim 19, with said external device comprised of a transmitter transmitting said modified factory mode data stored in said external memory to said microprocessor.

21. The apparatus of claim 20, with said transmitter comprised of a third clock signal port and a third data signal port connected to said first clock signal port and a first data signal port of said main microprocessor respectively.

22. The apparatus of claim 19, with said external microprocessor comprised of a third clock signal port and a third data signal port connected to said first clock signal port and a first data signal port of said main microprocessor respectively.

23. An apparatus for setting factory mode data in a display apparatus, comprising:

an external controller disposed outside of said display apparatus;

a keyboard disposed within said external controller;

an external microprocessor connected to said key board and receiving said modified factory mode data from said keyboard;

an external memory connected to said external microprocessor and receiving and storing a modified factory mode data from said external microprocessor, transmitting said modified factory mode data stored in said external memory to said display apparatus;

a main microprocessor disposed within said display apparatus, receiving modified factory mode data transmitted from said external controller;

a main memory disposed within said display apparatus, having a factory mode address and a user mode address, storing initial factory mode data in said factory mode address and user mode data in said user mode address, storing said modified factory mode data in said factory mode address in response to said microprocessor; and

a video stage coupled to said main microprocessor, receiving one of said modified factory mode data and said user mode data driving a screen representing said one of said modified factory mode data and said user mode data.

24. The apparatus of claim 23, with said main microprocessor comprised of a plurality of chip select ports, a first clock signal port and a first data signal port.

25. The apparatus of claim 24, with said main microprocessor comprised of an inter-integrated circuit bus communication protocol with said first clock signal port and said first data signal port and a serial data communication connected to said external device.

26. The apparatus of claim 24, further comprised of said main memory being coupled to first one of said chip select ports, said clock port and said data signal port, storing said modified factory mode data in said factory mode address in response to said first chip select port of said microprocessor.

27. The apparatus of claim 26, with said video stage coupled to said second one of said chip select ports, said clock port and said data signal port of said microprocessor, receiving one of said modified factory mode data and said user mode data, driving a screen representing said one of said modified factory mode data and said user mode data.

28. The apparatus of claim 27, with said external controller comprised of a third clock signal port and a third data signal port connected to said first clock signal port and a first data signal port of said main microprocessor respectively.

29. The apparatus of claim 23, further comprised of a transmitter coupled to said external controller, transmitting said modified factory mode data to said main microprocessor.

30. The apparatus of claim 24, with said main microprocessor comprised of a plurality of buffer memories connected to said first clock signal port and said first data signal port, storing communication data received from said external device.

31. The apparatus of claim 24, with said main microprocessor comprised of a serial data communication connected to said external controller, receiving said modified factory mode data through said serial data communication.