Hybrid hypercube/torus architecture

• US 6,230,252 B1
• Filed: 11/17/1997
• Issued: 05/08/2001
• Est. Priority Date: 11/17/1997
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Silicon Graphics Incorporated (Graphics Properties Holdings, Inc.)
• Inventors: Galles, Michael B., Thorson, Greg, Passint, Randal S.
• Primary Examiner(s): Chan, Eddie
• Assistant Examiner(s): Monestime, Mackly
• Application Number:
  US08/971,588
• Time in Patent Office: 1,268 Days
• Field of Search: 395/800.12, 395/800.11, 395/800.13, 395/800.15, 712/12, 712/11, 712/23, 712/15, 712/16, 709/200, 709/220, 709/221, 709/238, 709/242
• US Class Current: 712/12
• CPC Class Codes: G06F 15/17381 Two dimensional, e.g. mesh, torus
• CPC Class Codes: G06F 15/803 Three-dimensional arrays or hypercubes

Abstract

A scalable multiprocessor system includes processing element nodes. A scalable interconnect network includes physical communication links interconnecting the processing element nodes in an n-dimensional topology, and routers for routing messages between the processing element nodes on the physical communication links. The routers are capable of routing messages in hypercube topologies of at least up to six dimensions, and further capable of routing messages in at least one n dimensional torus topology having at least one of the n dimensions having a radix greater than four, such as a 4×8×4 torus topology.

Claims

1. A scalable multiprocessor system comprising:

a plurality of processing element nodes, each processing element node having at least one processor and memory; and

a scalable interconnect network including;

physical communication links interconnecting the processing element nodes in an n-dimensional topology, and

routers for routing messages between the plurality of processing element nodes on the physical communication links, wherein the routers are capable of routing messages in hypercube topologies of at least up to six dimensions, and further capable of routing messages in at least one n dimensional torus topology having at least one of the n dimensions having a radix greater than four.

2. The scalable multiprocessor system of claim 1 wherein each router is coupled to at least two processing element nodes.

3. The scalable multiprocessor system of claim 1 wherein each processing element node includes two processors.

4. The scalable multiprocessor system of claim 1 wherein each processing element node includes four processors.

5. The scalable multiprocessor system of claim 1 wherein each router includes at least eight router ports.

6. The scalable multiprocessor system of claim 5 wherein two of the at least eight router ports are coupled directly to two corresponding processor element nodes.

7. The scalable multiprocessor system of claim 5 wherein six of the at least eight router ports are coupled directly to six corresponding physical communication links.

8. The scalable multiprocessor system of claim 1 wherein each router includes router ports and lookup tables at each router port for providing a port direction for exiting from the next router in a given route in the system.

9. The scalable multiprocessor system of claim 8 wherein the lookup tables at each port include a local router table having directions for routing between processor element nodes within a local subnetwork and a global router table having directions for routing between processor element nodes in two subnetworks.