Method of assembling modules to form a complex integrated circuit and corresponding module architecture

• US 6,230,308 B1
• Filed: 03/23/1998
• Issued: 05/08/2001
• Est. Priority Date: 03/28/1997
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Inventors: Battaia, Alberto, Ganzelmi, Roberto, Pozzi, Cesare
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Garbowski, Leigh Marie
• Application Number:
  US09/046,216
• Time in Patent Office: 1,142 Days
• Field of Search: 716/1, 716/2, 716/3, 716/7, 716/17, 716/8
• US Class Current: 716/137
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347

Abstract

The method relates to assembling modules for an integrated circuit comprising at least a plurality of modules. The method provides for the formation of at least one module architecture which comprises a plurality of modules and is aligned along one dimension of such modules. The invention also concerns an integrated circuit and a stacked module architecture obtained with the inventive assembling method.

Claims

1. A method of assembling functional modules to form a complex integrated circuit including a plurality of said functional modules arranged to have a predetermined height, wherein at least one of said functional modules has a predetermined width, the method comprising the step of:

providing a stacked architecture of simple modules within at least one of said functional modules having the predetermined width which are aligned along the height of said plurality of functional modules, and a common interface circuit interconnecting said stacked architecture of modules.

2. A method according to claim 1, further comprising the step of providing a connection to a system bus carrying system signals of the integrated circuit by means of system terminals arranged at the bottom of the architecture of simple modules.

3. A method according to claim 2, wherein each simple module includes separate internal logic circuits.

4. A method according to claim 3, further comprising the step of providing a connection of the internal logic circuits comprising a plurality of internal buses at each module included in the architecture of simple modules.

5. A method according to claim 1, further comprising the steps of:

processing all the signals generated by the common interface circuit within each simple module; and

fully or partly utilizing the signals from each simple module to supply the other simple modules included in the architecture of simple modules.

6. A method according to claim 5, further comprising the step of transferring the signals generated by the common interface circuit by system terminals placed at corresponding coordinates in the upper and lower portions of each simple module included in the architecture of simple modules.

7. An integrated circuit comprising:

a plurality of functional modules arranged to have a predetermined height, and wherein one of said plurality of functional modules has a predetermined height and width and is constructed as an architecture of simple modules aligned along the height of said functional modules; and

a common interface circuit interconnecting said simple modules contained in the at least one of said functional modules.

8. An integrated circuit according to claim 7, further comprising system terminals arranged at the bottom of the architecture of simple modules for connection to a system bus carrying system signals of the integrated circuit.

9. An integrated circuit according to claim 8, wherein each module included in the architecture of simple modules comprises first and second internal logic circuits physically separated from each other.

10. An integrated circuit according to claim 9, wherein said modules included in the architecture of modules have the same width.

11. An integrated circuit according to claim 10, wherein said first and second internal logic circuits have the same width.

12. An integrated circuit according to claim 9, wherein said first and second internal logic circuits are connected by a plurality of internal buses at each simple module included in the architecture of simple modules.

13. An integrated circuit according to claim 7, wherein each simple module included in the architecture of simple modules and the common interface circuit have system terminals located at corresponding coordinates in upper and lower portions of the simple modules and the common interface circuit for transferring the signals generated by the common interface circuit.

14. A module architecture comprising:

a plurality of functional modules, one of said functional modules having a predetermined height and width;

a plurality of simple modules aligned along one dimension within the functional module and forming an architecture of simple modules; and

a common interface circuit interconnecting said simple modules.

15. A module architecture according to claim 14, further comprising system terminals arranged at a bottom of said architecture of simple modules for connection to a system bus carrying system signals of the integrated circuit.

16. A module architecture according to claim 15, wherein each simple module comprises first and second internal logic circuits physically separated from each other.

17. A module architecture according to claim 16, wherein the plurality of simple modules have the same width.

18. A module architecture according to claim 17, wherein said first and second internal logic circuits have the same width.

19. A module architecture according to claim 18, wherein each simple module and the common interface circuit have system terminals located at corresponding coordinates in upper and lower portions of the simple modules for transferring the signals generated by the common interface circuit within the architecture of simple modules.

20. A module architecture according to claim 16, wherein said first and second internal logic circuits are connected by a plurality of internal buses at each simple module.