Process for making microstructures and microstructures made thereby

• US 6,232,150 B1
• Filed: 12/03/1998
• Issued: 05/15/2001
• Est. Priority Date: 12/03/1998
• Status: Expired due to Fees

• Current Assignee: Board of Regents of the University of Michigan (University of Michigan)
• Original Assignee: Board of Regents of the University of Michigan (University of Michigan)
• Inventors: Cheng, Yu-Ting, Najafi, Khalil, Lin, Liwei, Wise, Kensall D.
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): Simkovic, Viktor
• Application Number:
  US09/204,473
• Time in Patent Office: 894 Days
• Field of Search: 438/51-54, 438/55, 438/64, 438/67, 438/88, 438/89, 438/106, 438/107, 438/112, 438/119, 438/124, 438/126, 438/455, 438/456, 438/466, 438/470
• US Class Current: 438/119
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/0181 Using microheaters for bonding the lid
• CPC Class Codes: G01P 2015/0828 the mass being of the paddle type being suspended at one of its longitudinal ends
• CPC Class Codes: H01L 2924/16235 Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
• CPC Class Codes: H03H 3/0072 of microelectro-mechanical resonators or networks micromembranes or microbeams B81B2203/01; manufacture of microstructural devices in general B81C
• CPC Class Codes: H03H 9/1057 for microelectro-mechanical devices

Abstract

A method for making a microstructure assembly, the method including the steps of providing a first substrate and a second substrate; depositing an electrically conductive material on the second substrate; contacting the second substrate carrying the electrically conductive material with the first substrate; and then supplying current to the electrically conductive material to locally elevate the temperature of said electrically conductive material and cause formation of a bond between the first substrate and the second substrate.

Claims

1. A method for making a microstructure assembly, the method comprising the steps of:

(i) providing a first substrate and a second substrate;

(ii) depositing an electrically conductive material on the second substrate along a peripheral boundary line path of a predetermined area;

(iii) contacting the second substrate carrying the electrically conductive material along the peripheral boundary line path with the first substrate to define a Predetermined volume therebetween; and

then

(iv) supplying current to the electrically conductive material to elevate the temperature of said electrically conductive material locally along the peripheral boundary line path and cause formation of a localized high-temperature bond between the first substrate and the second substrate to enclose the predetermined volume therebetween.

2. The method of claim 1 wherein the second substrate is one of a silicon wafer and glass wafer, the wafer having a layer of an oxide of silicon on the surface, which layer is thermally and electrically insulating.

3. The method of claim 1 further comprising the steps of:

before the step of depositing the electrically conductive material, forming a cavity in the surface of the second substrate; and

depositing said electrically conductive material along the peripheral boundary line path which circumscribes the opening of the cavity.

4. The method of claim 3 further comprising the step of:

after the step of depositing the electrically conductive material, depositing a layer of electrically insulating material on the surface of the second substrate to cover at least the electrically conductive material and the interior surface of the cavity.

5. The method of claim 4 further comprising the step of:

depositing a bonding material over the insulating layer in a pattern following along the peripheral boundary line path of the electrically conductive material.

6. The method of claim 4 wherein the layer of electrically insulating material of claim 4 is selected from the group consisting of silicon nitride, silicon dioxide, and mixtures thereof.

7. The method of claim 3 further comprising the step of:

before step (iii) of claim 1, placing a microelectronic device on the surface of the first substrate, whereby step (iii) of contacting the first and second substrates provides sealing of the cavity with the microelectronic device disposed therein.

8. The method of claim 1 wherein the electrically conductive material is selected from the group consisting of gold, polysilicon, aluminum, platinum, tungsten, any other refractory metal, and mixtures thereof.

9. The method of claim 5 wherein the bonding material is selected from the group consisting of silicon dioxide, silicon, gold, copper, titanium, polysilicon, glass frit, PSG, BSG, soldering materials such as indium, silicon/gold alloy, and silicon/aluminum alloy, and mixtures thereof.

10. The method of claim 1 further comprising the step of:

while current is being supplied in step (iv), applying a bonding material between said first and second substrates by decomposing a gas on contact with said electrically conductive material, thereby forming a decomposition product which bonds said substrates together.

11. The method of claim 3 wherein the cavity forming step includes one of the steps of etching the cavity and machining the cavity.

12. The method of claim 11 wherein the cavity etching step includes one of the steps of isotropic etching and anisotropic etching.

13. The method of claim 1 wherein the electrically conductive material depositing step includes one of the steps of chemical vapor deposition, sputtering and evaporation.

14. The method of claim 1 wherein the bond is one of a fusion bond, a eutectic bond and a soldering bond.

15. The method of claim 1 wherein the first substrate is silicon, the second substrate is silicon, the bonding material is gold and the bond is a eutectic bond formed by silicon and gold.

16. The method of claim 1 wherein the first substrate is silicon, the second substrate is silicon, the bonding material is polysilicon, and the bond is a fused silicon to silicon bond.

17. The method of claim 1 wherein the first substrate is glass, the second substrate is silicon, the bonding material is polysilicon, and the bond is a fusion bond formed between silicon and glass.

18. A method for simultaneously micropackaging a plurality of microdevices, the method comprising the steps of:

fabricating a plurality of microdevices on a first substrate wafer such that the microdevices are arranged in a first array;

fabricating a corresponding plurality of micropackages on a second substrate wafer such that the micropackages are arranged in a second array which is aligned to match the first array, the micropackages having a predetermined peripheral boundary line area defining an opening into an aperture of a predetermined volume;

fabricating an array of microheaters on the micropackages of the second array along the predetermined peripheral boundary line area;

fabricating electrically conductive interconnection lines between the microheaters;

moving the first substrate and the second substrate toward each other until the array of micropackages comes into biased contact with the first substrate along an interface region, such that each microdevice in the first array is covered by one of the micropackages, and such that the array of microheaters is interposed at the interface region along the predetermined peripheral boundary line area between the first array of devices and the second array of micropackages; and

applying electrical current through the interconnection lines to thermally activate the microheaters for localized high-temperature bonding and hermetically sealing the micropackages to the first substrate to thereby encapsulate and protect the devices on the first substrate.

19. The method according to claim 18, and further comprising the steps of:

fabricating the first substrate wafer and the second substrate wafer such that the diameter of the second substrate wafer is larger than the diameter of the first substrate wafer; and

fabricating electrically conductive contact pads on the second substrate wafer such that the contact pads are electrically connected to the interconnection lines, and such that the contact pads are proximate to the perimeter of the second substrate wafer whereby electrical current applied to the contact pads flows through the interconnection lines unobstructed when the first substrate wafer and the second substrate wafer are moved toward each other for bonding.

20. A method for making a microstructure assembly comprising the steps of:

depositing an electrically conductive microheater material on one of a first substrate and a second substrate in a predetermined peripheral bonding area;

contacting one of the substrates with the other substrate along the predetermined peripheral bonding area to define a predetermined volume therebetween; and

resistive heat bonding the substrates to one another along the predetermined peripheral bonding area in response to applying current to the electrically conductive microheater material to form a localized high-temperature bond between the substrates and encapsulate the predetermined volume therebetween.

21. The method of claim 20 further comprising the steps of:

placing a microelectronic device on the surface of one of the first and second substrates; and

hermetically sealing the microelectronic device within the predetermined volume defined between the first and second substrates.

22. The method of claim 21 further comprising the step of:

depositing a layer of insulating material on a surface of one of the first and second substrates to cover at least the electrically conductive material and an interior surface defining the predetermined volume.

23. The method of claim 22 further comprising the step of:

depositing a bonding material over the layer of insulating material in a pattern following along the predetermined peripheral bonding area of the electrically conductive material.