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Semiconductor interconnect interface processing by high temperature deposition

  • US 6,232,230 B1
  • Filed: 01/05/1999
  • Issued: 05/15/2001
  • Est. Priority Date: 01/05/1999
  • Status: Expired due to Term
First Claim
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1. A method of manufacturing a semiconductor device, comprising the steps of:

  • providing a semiconductor wafer with a first dielectric layer formed thereon;

    forming an opening in said first dielectric layer, said opening defined by walls of said first dielectric layer;

    filling said opening with a conductive material;

    forming a second dielectric layer on said first dielectric layer;

    forming an opening in said second dielectric layer, said opening defined by walls of said second dielectric layer and connected to said conductive material;

    forming an adhesion/barrier layer to line said second dielectric layer in said opening and in contact with said conductive material, said forming of said adhesion/barrier layer performed at a high temperature whereby intermixing of said conductive material and said adhesion/barrier layer occurs;

    cooling and adhesion/barrier layer to a temperature below a temperature at which seed material agglomerates; and

    forming a seed layer of said seed material to line said adhesion/barrier layer at a temperature below said agglomeration temperature.

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