Apparatus and method for controlling plasma uniformity in a semiconductor wafer processing system

• US 6,232,236 B1
• Filed: 08/03/1999
• Issued: 05/15/2001
• Est. Priority Date: 08/03/1999
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Mett, Richard, Welch, Michael, Bjorkman, Claes, Shan, Hongqing, Luscher, Paul
• Primary Examiner(s): POWELL, WILLIAM A
• Application Number:
  US09/365,999
• Time in Patent Office: 651 Days
• Field of Search: 156/345.P, 156/345.C, 156/345.PT, 156/345.PW, 156/345.WH, 216/67, 438/710, 438/715, 438/726
• US Class Current: 438/715
• CPC Class Codes: H01J 37/32082 Radio frequency generated discharge H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence
• CPC Class Codes: H01J 37/32165 Plural frequencies

Abstract

An apparatus and method for controlling a plasma in a plasma processing system. The apparatus comprises a wafer support pedestal surrounded by a process kit that is driven by an RF signal. Both an electrode (cathode) in the pedestal and the process kit are driven with an RF signal to establish a primary plasma above the pedestal and a secondary plasma above the process kit.

Claims

1. Apparatus for controlling a plasma in a plasma processing system, comprising:

a wafer support pedestal;

a process kit surrounding said wafer support pedestal; and

an RF power supply coupled to said process kit.

2. The apparatus of claim 1 wherein said RF power supply is also coupled to said wafer support pedestal.

3. The apparatus of claim 1 further comprising a second RF power supply coupled to said wafer support pedestal.

4. The apparatus of claim 1 wherein said wafer support pedestal contains a chuck with a peripheral flange, said process kit is supported by said flange.

5. The apparatus of claim 4 wherein said process kit is supported in a spaced apart relationship with respect to said flange to form a gap therebetween.

6. The apparatus of claim 5 further comprising a cooling gas source coupled to said gap.

7. The apparatus of claim 1 wherein the wafer support pedestal comprises an annular electrode that is located beneath the process kit and said RF power supply is coupled to said annular electrode.

8. A plasma processing system comprising:

a chamber;

a wafer support pedestal disposed within said chamber;

a process kit surrounding said wafer support pedestal; and

an RF power supply coupled to said process kit.

9. The system of claim 8 wherein said RF power supply is also coupled to said wafer support pedestal.

10. The system of claim 8 further comprising a second RF power supply coupled to said wafer support pedestal.

11. The system of claim 9 wherein said RF power supply provides a signal having a first frequency to said wafer support and a second signal having a second frequency to said process kit.

12. The system of claim 9 wherein said first and second frequencies are different.

13. The system of claim 11 wherein said process kit is supported in a spaced apart relationship with respect to said wafer support whereby a gap is formed therebetween.

14. The system of claim 12 wherein said gap defines a pathway for a cooling gas.

15. The system of claim 13 further comprising a cooling gas source that supplies said cooling gas to said gap.

16. The apparatus of claim 8 wherein the wafer support pedestal comprises an annular electrode that is located beneath the process kit and said RF power supply is coupled to said annular electrode.

17. In a semiconductor wafer processing system, having a chamber containing a gas, a wafer support pedestal, a process kit and an RF power supply, a method for controlling a plasma uniformity comprising the steps of:

(a) supplying a first RF signal to the wafer support pedestal to produce a primary plasma; and

(b) supplying a second RF signal to the process kit to produce a secondary plasma.

18. The method of claim 17 wherein said first and second RF signals have the same frequency.

19. The method of claim 17 wherein said first and second RF signals have different frequencies.

20. The method of claim 19 wherein said first frequency is approximately 400 KHz to 200 MHz.

21. The method of claim 19 said second frequency is approximately 400 kHz to 60 MHz.

22. The method of claim 17 further comprising the step of

c) controlling a temperature of said process kit.

23. A computer readable storage medium having program code embodied therein, said program code, when executed by a computer, for controlling a plasma in a semiconductor processing system having a chamber containing a gas, a wafer support pedestal, a process kit and an RF power supply, said program code controlling the semiconductor processing system in accordance with the following steps:

(a) supplying a first RF signal to the wafer support to produce a primary plasma; and

(b) supplying a second RF signal to the process kit to produce a secondary plasma.

24. The computer readable storage medium of claim 23 wherein said first and second RF signals have the same frequency.

25. The computer readable storage medium of claim 23 wherein said first and second RF signals have different frequencies.

26. The computer readable storage medium of claim 24 wherein said first frequency is approximately 400 kHz to 200 MHz.

27. The computer readable storage medium of claim 24 wherein said second frequency is approximately 400 kHz to 60 MHz.

28. The computer readable storage medium of claim 24 wherein said program comprises the further step of controlling a temperature of said process kit.

29. Apparatus for supporting a semiconductor wafer, comprising:

a wafer support having a periphery;

a cathode electrode disposed centrally with respect to said wafer support; and

a secondary electrode, disposed within said wafer support, adjacent said periphery.

30. The apparatus of claim 29 wherein said wafer support is adapted to receive a process kit that surrounds said periphery.

31. The apparatus of claim 30 wherein said wafer support has a peripheral flange.

32. The apparatus of claim 30 wherein said electrode is situated proximate said peripheral flange beneath said process kit.