Topography processor system

• US 6,233,361 B1
• Filed: 02/23/1996
• Issued: 05/15/2001
• Est. Priority Date: 08/24/1993
• Status: Expired due to Fees

• Current Assignee: Roger Colston Downs
• Original Assignee: Roger Colston Downs
• Inventors: Downs, Roger Colston
• Primary Examiner(s): Bella, Matthew C.
• Application Number:
  US08/601,048
• Time in Patent Office: 1,908 Days
• Field of Search: 382/260, 382/309, 382/325, 395/183.01, 395/183.02, 395/183.22, 371/22.4, 371/22.5, 371/22.6, 371/26, 371/24, 371/25.1, 714/25, 714/32, 714/37, 714/38, 714/39, 714/46
• US Class Current: 382/260
• CPC Class Codes: G01S 17/89 for mapping or imaging
• CPC Class Codes: G01S 7/4802 using analysis of echo signal for target characterisation; Target signature; Target cross-section
• CPC Class Codes: G01S 7/497 Means for monitoring or calibrating
• CPC Class Codes: G06T 5/50 using two or more images, e.g. averaging or subtraction
• CPC Class Codes: H04N 5/142 Edging; Contouring

Abstract

A topography processor system comprising a phased image sensor array, at least one processor arranged to perform range decompression of imaged detail, and a means for allowing non interruptive graphic macro diagnosis based on a graphic display of the frame rate macroscopic behavior of internal transfer functions of the system figures 15, 17 permit visual, augmented visual or automatic visual determination of the system'"'"'s integrity.

Claims

1. A topography processor system arranged to execute internal transfer functions, the system comprising,

an array of at least two image systems, and

at least one processor, wherein the processor includes

processing system diagnostic means for stimulating the system with predefined data,

wherein the processor is arranged to process imaged detail on said predefined data and generate for output at least one of a graphic visual, augmented visual, and automatic visual display, and

wherein the processing system diagnostic means is arranged to diagnose system faults and internal transfer function faults by employing at least one of the graphic visual, augmented visual, and automatic visual displays.

2. A topography processor system as claimed in claim 1 wherein a frame rate topography processor is provided which allows stabilised frame rate macroscopic system performance.

3. A topography processor system as claimed in claim 1 wherein said diagnosis is performed non interruptively to allow an operationally configured system and its performance envelope to be preserved.

4. A topography processor system as claimed in claim 3 wherein the non interruptive aspect of the diagnosis does not require extensive second layer BITE.

5. A topography processor system as claimed in claim 3 wherein the diagnostic monitoring is possible using system sufficient data, control and address highways.

6. A topography processor system as claimed in claim 3 wherein the diagnostic monitoring does not require additional system external equipments.

7. A topography processor system as claimed in claim 1 wherein the diagnosis provided by said diagnostic means encompasses all the system processes executing to completion.

8. A topography processor system as claimed in claim 1 wherein the diagnosis allows first line system GO/NOGO decisions to be reached, based on the performance of system transfer functions.

9. A topography processor system as claimed in claim 1 further including augmented visual diagnostic means to allow first line monitoring of system end to end performance against apriori reference data.

10. A topography processor system as claimed in claim 1 further including automatic visual means to allow first line monitoring of system end to end performance against apriori reference data.

11. A topography processor system as claimed in claim 1 further including non interruptive system stimulation and monitoring means for system performance analysis.

12. A topography processor system as claimed in claim 1 further including correlatable differential image sensor input means to allow stimulation of the topography processor system.

13. A topography processor system as claimed in claim 1 further including closed loop stimulation and monitoring means to allow system performance assessment.

14. A topography processor system as claimed in claim 1 further comprising resolution means for employing an association of generic patterns between a plurality of image sensors to resolve the system relative spacial position of topographical detail in the observed scenario.

15. A topography processor system as claimed in claim 1 further comprising identification and partitioned storage means which allow binary event signals comprising generic image pattern information, output from an image pattern thread processor or equivalent and representative of vectors of particular and different attributes, to be generated from each of the image sensors composite video signals and for each binary event comprising such signals to assign an identity and pass such information as partitioned sets of data to other processes.

16. A topography processor system as claimed in claim 1 further comprising combination synthesis means which allows combinations of vector identities from sets of sets of such identities to be synthesised and passed to other processes.

17. A topography processor system as claimed in claim 1 further comprising identity transform means which support parallel and cascaded operations on sets of synthesised identity combinations where apriori transform knowledge is employed to solve vector equations or other processes to be computed within an effective multiple address time.

18. A topography processor system as claimed in claim 1 further comprising dedicated ordered partitioned buffer means to register results from parallel identity transform processes and allows, through the ordered reading of sets of such buffers, the output of a three dimensional scenario data base, comprising unique multiple vector intercepts.

19. A topography processor system as claimed in claim 1 further comprising processor architecture means to allow dynamic reconfiguration of processor resources necessary to support frame rate operation.

20. A topography processor system as claimed in claim 1 further comprising means for co-ordinated scanning of a common scenario by the image sensors whilst maintaining their different perspectives to allow improved range discrimination.

21. A topography processor system as claimed in claim 1 further comprising means for iterative synthesis of combinations of, and comparison of, subset patterns between sets of such subset patterns derived from a plurality of image sensors composite video signals, where correlation of such subset patterns members between image sensors is detected, thereby to allow the system relative spacial position of their associated elements of topographical detail to be fixed from apriori knowledge.

22. A topography processor system as claimed in claim 1 further comprising real time identification and partitioning means to extract subset patterns from a plurality of composite video signals.

23. A topography processor system as claimed in claim 22 wherein information of identified and partitioned subset patterns may be passed to a further process.

24. A topography processor system as claimed in claim 1 further comprising electro-mechanical means to allow iterative synthesis of subset pattern combinations having time coincidence between a plurality of image sensors.

25. A topography processor system as claimed in claim 1 further comprising relative image sensor frame and line synchronisation means to allow iterative synthesis of subset pattern combinations having time coincidence between a plurality of image sensors.

26. A topography processor system as claimed in claim 1 further comprising control loop means to refine iterative synthesis of combinations of subset patterns having time coincidence between a plurality of image sensors.

27. A topography processor system as claimed in claim 1 further comprising real time multiple comparison means to identify unique multiple matches between sets of sets of subset patterns.

28. A topography processor system as claimed in claim 1 further comprising real time computation means to determine the system relative spacial position of elements of topographical detail defined by a multiple match of subset pattern members between image sensors.

29. A topography processor system as claimed in claim 1 further comprising means for passing three dimensional scenario data base to other processes.

30. A topography processor system as claimed in claim 1 wherein co-operatively slaveable phased virtual image sensor array means are provided to allow a plurality of equivalent virtual image sensors, to be logically and physically positioned and orientated, such that the boresights of their respective fields of view are parallel and such that they generate images of a common scenario from their different perspectives, and that common image detail is registered in corresponding line scans for each such virtual image sensor, and that the frame and line sync generation for each such sensor is controlled such that a time coincidence exists between the characteristics of theses signals, and each such virtual image sensor'"'"'s field of view may be slaved or scan in a controlled fashion so as to preserve their differing perspective views of a common scenario within their shared field of regard, and such that imaged information may be passed to a further process.

31. A topography processor system as claimed in claim 1 further comprising control means for autonomous automatic or manual definition of a virtual image sensor'"'"'s field of view boresight slave position within the field of regard of a phased virtual image sensor array.

32. A topography processor system as claimed in claim 1 further comprising control means for an external processor defined slave position of a virtual image sensor'"'"'s field of view boresight within the field of regard of a phased virtual image sensor array.

33. A topography processor system as claimed in claim 1 further comprising control means for an autonomous iterative inter frame time relative shift of a frame and line sync between a plurality of image sensors in a phased image sensor array.

34. A topography processor system as claimed in claim 1 further comprising control means to allow for an external processor defined time relative shift of a frame and line sync separation between a plurality of image sensors in a phased image sensor array.

35. A topography processor system as claimed in claim 1 further comprising communication means for allowing imaged information derived from imagers comprising a phased image sensor array, to be passed to an external processor system.

36. A topography processor system as claimed in claim 1 further comprising virtual image sensor means to allow a plurality of similar image sensors to be organised in an array, where the logical and physical position and orientation of each such image sensor in the array is such that their individual fields of view collectively cover a continuous scenario comprising the individual images from each image sensor, and where it is possible to generate in real time a virtual image sensor image from components of images from one or more adjoining image sensors in the array such that the field of view of the virtual image sensor is equivalent to the field of view of any image sensor in the array and where the field of regard of the virtual image sensor comprises the individual fields of view of the image sensors in the array.

37. A topography processor system as claimed in claim 1 further comprising relative synchronisation means for establishing and maintaining a relative frame and line sync separation between image sensors comprising a virtual image sensor necessary to allow real time extraction of component image sensor luminance subsets in support of a virtual image.

38. A topography processor system as claimed in claim 37 further comprising control means to define the virtual image sensor'"'"'s field of regard relative virtual image sensor'"'"'s boresight position.

39. A topography processor system as claimed in claim 37 further comprising logical means to identify luminance signal subsets and frame and line sync characteristics for each virtual image sensor'"'"'s field of view included in the system.

40. A topography processor system as claimed in claim 1 further comprising composite video synthesis means for combining subsets of luminance signals with an appropriately generated synthetic frame and line sync signal to generate a composite video signal of each virtual image sensor included in the system.

41. A topography processor system as claimed in claim 1 further comprising functional replication means for a given array of image sensors comprising a virtual image sensor included in the system to support the generation of multiple, simultaneous and different virtual image sensor composite video signals.

42. A topography processor system as claimed in claim 1 further comprising manual, automatic or external processor definition means to electronically slave one or more virtual image sensors field or fields of view independently and simultaneously across a field of regard comprising the fields of view of the image sensors comprising the array.

43. A topography processor system as claimed in claim 1 further comprising electronic means for the rapid and accurate positioning of a field of view boresight of a virtual image sensor within its field of regard.

44. A topography processor system as claimed in claim 1 further comprising communication means to allow information in a virtual image sensor'"'"'s field of view to be communicated to another processing system.

45. A topography processor system as claimed in claim 1 further comprising three axis image stabilization means employing address correction applied to the buffering of information derived from an image sensor composite video signal, to allow stabilized data to be recovered using normal addressing.

46. A topography processor system as claimed in claim 1 further comprising three axis image stabilization means employing address correction applied to allow the recovery of stabilised image sensor luminance data from buffered information derived from an image sensors composite video signal, stored using normal addressing.

47. A topography processor system as claimed in claim 1 further comprising three axis image stabilization means employing address correction terms based on information from traditional rate sensors.

48. A topography processor system as claimed in claim 1 further comprising three axis image stabilization means employing address correction terms based on information from software pattern tracking algorithms.

49. A topography processor system as claimed in claim 1 further comprising three axis image stabilization means employing address correction applied to allow the recovery of stabilised image sensor luminance data from buffered information derived from an image sensors sensed luminance, stored using CCD or equivalent technologies.

50. A topography processor system as claimed in claim 1 further comprising three axis image stabilization for a plurality of associated (in the context of virtual image sensor or phased image sensor arrays) CCD sensing means employing address correction applied to allow the recovery of stabilised image sensor luminance data from buffered information derived from an image sensors sensed luminance, stored using CCD or equivalent technologies.

51. A topography processor system as claimed in claim 1 further comprising image pattern thread processing means which allow for the real time extraction of important image pattern thread information from the composite video signal of an image sensor, CCD or equivalent, comprising a luminance signal spectral analyser or equivalent capable of identifying image pattern outline and relief contour detail derived from luminance signal frequency excursions transiting through preset upper or lower frequency limits where such events generate in real time a binary event signal and an associated identity for each such event and where such information may be passed to a further processing or display system.

52. A topography processor system as claimed in claim 1 further comprising real time identification means to log the position within the image sensor'"'"'s raster scan, that is within the field of view of the image sensor, of each binary event representing elements of image pattern threads.

53. A topography processor system as claimed in claim 1 further comprising real time identification means to count the sequential binary events of particular attributes within each line scan of the image sensor.

54. A topography processor system as claimed in claim 1 further comprising communication means to pass to further processing systems partitioned sequential terminated lists of binary event identities representative of imaged pattern thread elements.

55. A topography processor system as claimed in claim 1 further comprising communication means to pass to further processing systems binary event data as an image mapped array.

56. A topography processor system as claimed in claim 1 further comprising output double buffering of image pattern thread data means to pass such data to a further processing system allowing continuous data output at an image sensor frame rate with maximum data latencies of 20 ms (UK).

57. A topography processor system as claimed in claim 1 further comprising data reduction means to expedite the further analysis of image pattern thread data.

58. A topography processor system as claimed in claim 1 further comprising interference means which through mixing of a clock signal operating at the maximum bandwidth frequency of the image sensor with luminance information allows a reduction in polarisation effects of relative imaged feature and image sensor line scan orientation.

59. A topography processor system as claimed in claim 1 further comprising means for the display of composite video synthesised by the combination of the binary event signal with current stripped frame and line sync information from a composite video signal of the image sensors.

60. A topography processor system as claimed in claim 1 further comprising a variety of processors to simultaneously identify image pattern thread elements with differing attributes for simultaneous output to a further processing or display system.