Encapsulate resin LOC package and method of fabrication

• US 6,236,107 B1
• Filed: 06/07/1995
• Issued: 05/22/2001
• Est. Priority Date: 04/29/1994
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Low, Siu Waf, Chan, Min Yu, Goh, Jing Sua
• Primary Examiner(s): Saadat, Mahshid
• Assistant Examiner(s): CRUZ, LOURDES C
• Application Number:
  US08/474,421
• Time in Patent Office: 2,176 Days
• Field of Search: 257/666, 257/691
• US Class Current: 257/666
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4826 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/4951 Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/20753 : larger or equal to 30 microns less than 40 microns

Abstract

A method and apparatus for fabricating small form factor semiconductor chips having high temperature resistance, good humidity and chemical resistance and good dielectric properties. The semiconductor chip includes a lead frame (10) attached to an integrated circuit die (30) by a lead-on-chip (LOC) method. Wire bonds (40) are employed to connect the integrated circuit die (30) to conduction leads (75) on the lead frame (10). After the wire bonding process, the surface of the wire bonded integrated circuit is encapsulated with a layer of resin (50) using either a direct dispensing method or by a screen printing method. The encapsulated integrated circuit may then be cured and functionally tested.

Claims

1. A small form factor semiconductor chip comprising:

a lead frame;

at least one section of adhesive securing said lead frame to an integrated circuit die, said lead frame being positioned above said integrated circuit die;

at least one wire bond electrically connecting at least one contact pad to said lead frame; and

a resin encapsulant covering only one surface of the integrated circuit die.

2. The semiconductor chip of claim 1, wherein the small form factor semiconductor chip further comprises a plurality of wire bonds and a plurality of contact pads, each said wire bond electrically connecting one of said contact pads with said lead frame.

3. The semiconductor chip of claim 2, wherein said wire bonds are comprised of gold.

4. The semiconductor chip of claim 1, wherein said adhesive is double-sided adhesive tape.

5. The semiconductor chip of claim 1, wherein said resin encapsulant is silicone.

6. The semiconductor chip of claim 1, wherein said resin encapsulant is epoxy.

7. The semiconductor chip of claim 1, wherein said resin encapsulant has a thickness of from 20 Mils to 40 Mils.

8. The semiconductor chip of claim 1, wherein the small form factor semiconductor chip further comprises two sections of adhesive comprising double-sided adhesive tape.

9. The semiconductor chip of claim 2, wherein the small form factor semiconductor chip further comprises two sections of adhesive comprising double-sided adhesive tape wherein said contact pads are located along a centerline of said integrated circuit die and each one of said two sections of double-sided adhesive tape is placed on alternate sides of said contact pads.

10. The semiconductor chip of claim 1, wherein the small form factor semiconductor chip further comprises two sections of adhesive comprising double-sided adhesive tape wherein each of said two sections of double-sided adhesive tape contacts one or more leads located on said lead frame.

11. The semiconductor chip of claim 1, wherein the small form factor semiconductor chip further comprises two sections of adhesive comprising double-sided adhesive tape wherein said lead frame contains at least one elongated strip running substantially parallel to a centerline of said integrated circuit die, said at least one elongated strip being in contact with one side of each of said double-sided adhesive tape sections.

12. The semiconductor chip of claim 1, wherein said semiconductor chip is incorporated into a multichip module.