Multi-chip chip scale package

• US 6,236,109 B1
• Filed: 02/01/1999
• Issued: 05/22/2001
• Est. Priority Date: 01/29/1999
• Status: Expired due to Term

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Lin, Cheng-Te, Hsuan, Min-Chih
• Primary Examiner(s): Thomas, Tom
• Assistant Examiner(s): Parekh, Nitin
• Application Number:
  US09/241,625
• Time in Patent Office: 841 Days
• Field of Search: 257/677, 257/668, 257/688, 257/777-778, 257/707, 257/713, 257/701-706, 257/623, 257/690
• US Class Current: 257/688
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16245 the item being metallic
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/49572 consisting of thin flexible metallic tape with or without a film carrier H01L23/49503 - H01L23/49568 and H01L23/49575 - H01L23/49579 take precedence
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01077 Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor

Abstract

A multi-chip chip scale package. A film carrier is in use. Two chips with different sizes can be disposed on the same film carrier. The flip chip technique is used to arrange each chip on each side of the film carrier face to face. A bump is formed on each chip to electrically connect with the film carrier. An insulation material is infilled between the chips to leave one side of each chip exposed. The conductive wires of the film carrier are connected with the chip directly without going through other carrier.

Claims

1. A multi-chip chip scale package, comprising:

a film carrier, further comprising;

an insulation film; and

a plurality of conductive wires, arranged on the insulation film;

a first chip, disposed on a first side of the insulation film of the film carrier, and having a first bump connecting to one of the conducting wires;

a second chip, disposed on a second side of the film carrier opposite to the first side, and having a second bump connecting to one of the conducting wires;

an insulation material, infilled between the first and the second chips on both the first and the second sides of the film carrier; and

a printed circuit board directly connected to the conducting wires of the film carrier.

2. The package according to claim 1, wherein the first chip has a size smaller than a size of the second chip.

3. The package according to claim 1, wherein the film carrier further comprises at least one locating hole filled by the insulation material.

4. The package according to claim 1, wherein film carrier further comprises a free-floating ring beset by the insulation film to further support the conductive wires.

5. The package according to claim 1, wherein the film carrier further comprises a corner supported ring beset by and connecting to the insulation film.

6. The package according to claim 5, wherein the corner supported ring have a plurality of corners connected with the insulation film.

7. The package according to claim 6, wherein the corners each has at least a locating hole.

8. The package according to claim 1, wherein the first and the second chips each has one bared side, and the other side sealed by the insulation material.

9. A printed circuit board having a package disposed thereon, comprising:

a substrate; and

a plurality of printed circuits on the substrate;

wherein the package comprises;

a film carrier, further comprising;

an insulation film; and

a plurality of conductive wires, arranged on the insulation film, and directly connected to one of the printed circuits;

a first chip, disposed on a first side having the insulation film of the film carrier, and having a first bump connecting to the film carrier;

a second chip, disposed on a second side of the film carrier opposite to the first side, and having a second bump connecting to the film carrier, one of the first chip and the second chip is connected to the substrate; and

an insulation material, infilled between the first and the second chips on both the first and the second sides of the film carrier.

10. The printed circuit board according to claim 9, wherein one of the first and the second chips has a rear surface connecting to at least one of the printed circuits on the substrate, and the other one of the first and the second chips has a bared rear surface.

11. The printed circuit board according to claim 9, wherein a heat dissipation apparatus is installed over the bared rear surface.

12. The printed circuit board according to claim 11, wherein the heat dissipation apparatus comprises a heat spreader.

13. The printed circuit board according to claim 11, wherein the heat dissipation apparatus comprises a heat sink.

14. The printed circuit board according to claim 9, wherein the insulation film further comprises at least a locating hole filled by the insulation material.

15. The printed circuit board according to claim 9, wherein the substrate comprises a multi-level printed circuit board.

16. The printed circuit board according to claim 9, wherein film carrier further comprises a free-floating ring beset by the insulation film to further support the conductive wires.

17. The package according to claim 9, wherein the film carrier further comprises a corner supported ring beset by and connecting to the insulation film.

18. The package according to claim 9, wherein the corner supported ring have a plurality of corners connected with the insulation film.

19. The package according to claim 9, wherein the corners each has at least a locating hole.