Cell voltage detection circuit, and method of detecting cell voltage

• US 6,236,215 B1
• Filed: 02/16/1999
• Issued: 05/22/2001
• Est. Priority Date: 02/20/1998
• Status: Expired due to Term

• Current Assignee: Murata Manufacturing Co Limited
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Kanehira, Hiroki
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): LUK, LAWRENCE W
• Application Number:
  US09/250,491
• Time in Patent Office: 826 Days
• Field of Search: 320/116, 320/117, 320/118, 320/119, 320/120, 324/429
• US Class Current: 324/429
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery

Abstract

A cell voltage detection circuit 20 comprises a first input selecting means 22 connected to the positive and negative electrodes of each of cells connected in series to each other to acquire a voltage from either a selected positive or negative electrode of an intended cell, a second input selecting means 24 connected to the positive and negative electrodes of each of the cells to acquire a voltage from either a selected positive or negative electrode of an intended cell, a voltage detector 30 to acquire a detected cell output voltage from output voltages of the first and second input selecting means 22 and 24, respectively, and a processing means 40 for converting a detected cell output voltage of the voltage detector 30 from analog to digital for calculation to provide the voltage of each cell.

Claims

1. A cell voltage detection circuit for a plurality of cells connected in series to each other in a battery and adapted to detect a voltage of each of the cells, comprising:

a first input selecting means connected to positive and negative electrodes of each cell to select either the positive or negative electrode of a selected cell and acquire a voltage of the cell;

a second input selecting means connected to the positive and negative electrodes of each cell to select either the positive or negative electrode of the selected cell and acquire a voltage of the cell;

a voltage detecting means for acquiring a detected output voltage from output voltages from the first and second input selecting means,

wherein the voltage detecting means comprises an operational amplifier and a plurality of resistor provided for the operational amplifier, the operational amplifier having a noninverting input terminal connected to the first input selecting means and an inverting input terminal connected to the second input selecting means; and

a processing means for converting the detected cell output voltage from the voltage detecting means from analogue to digital for calculating to thereby determine the voltage of the individual cell,

wherein the processing means comprises an analogue/digital converter to convert a detected output voltage of a cell from an analog to digital, and an arithmetic unit which calculates a digital output from the analog/digital converter to provide a voltage of each cell.

2. The cell voltage detection circuit as set forth in claim 1, wherein the battery is a cell.

3. The cell voltage detection circuit as set forth in claim 1, wherein the first input selecting means can select and be connected to a ground potential, and the second input selecting means can select and be connected to a negative reference voltage for calibration of the cell voltage.

4. The cell voltage detection circuit as set forth in claim 3, wherein when a same electrode of a cell is selected by the first and second input selecting means and a common mode voltage is applied to the noninverting and inverting input terminals of the voltage detecting means, the resistance of a plurality of adjusting resistors provided for the voltage detecting means is set to provide an output voltage from the voltage detecting means and the positive output voltage from the voltage detecting means is applied to the analog/digital conveoer.

5. The cell voltage detection circuit as set forth in claim 4, wherein the positive electrode of the cell is connected to the noninverting input terminal of the voltage detecting means via the first input selecting means, and the negative electrode of the cell is connected to the inverting input terminal of the voltage detecting means via the second input selecting means.

6. The cell voltage detection circuit as set forth in claim 1, wherein the first input selecting means can select and be connected to a positive reference voltage for calibration of the cell voltage, and the second input selecting means can select and be connected to a ground potential.

7. A method of detecting a voltage of each of a plurality of cells connected in series to each other in a battery by a cell voltage detection circuit comprising a first input selecting means connected to positive and negative electrodes of each cell to select either the positive or negative electrode of a selected cell and acquire a voltage of the cell;

a second input selecting means connected to the positive and negative electrodes of each cell to select either the positive or negative electrode of the selected cell and acquire a voltage of the cell;

a voltage detecting means for acquiring a detected output voltage from output voltages from the first and second input selecting means; and

a processing means for converting the detected cell output voltage from the voltage detecting means from analog to digital for calculation to thereby determine the voltage of the individual cell,

the method comprising the steps of;

selecting an input to the first input selecting means and an input to the second input selecting means to supply from the voltage detecting means a positive detected output voltage to the analog/digital converter of the processing means and calculate an amplification factor of the voltage detecting means based on a known calibrating reference voltage connected to either the first or second input selecting means;

supplying a common mode voltage from a same electrode of a cell to the voltage detecting means via the first and second input selecting means to acquire a first positive detected output voltage indicative of an error due to the common mode voltage supplied to the voltage detecting means;

supplying to a noninverting input terminal of the voltage detecting means a voltage at the positive cell electrode selected by the first input selecting means and to an inverting input terminal of the voltage detecting means a negative cell voltage selected by the second input selecting means, to acquire a second positive detected output voltage; and

calculating as follows by the processing means to determine a cell voltage;

8. The method as set forth in claim 7, wherein at the step where a common mode voltage is supplied from a same electrode of a cell to the voltage detecting means via the first and second input selecting means to acquire a first positive detected output voltage indicative of an error due to the common mode voltage supplied to the voltage detecting means, the resistance of the plurality of resistors of the voltage detecting means is set such that the detected output voltage of the voltage detecting means, supplied to the analog/digital converter of the processing means, is always a positive voltage.

9. The method as set forth in claim 7, wherein the battery is a cell.

10. A circuit to detect a voltage of at least one cell in a battery, the circuit comprising:

a first input selector adapted to be coupled to a positive and negative electrode of each cell;

a second input selector adapted to be coupled to a positive and negative electrode of each cell;

a voltage detector having a noninverting input terminal connected to the first input selector and an inverting input terminal connected to the second input selector; and

a processor having an analogue/digital converter coupled to the voltage detector and an arithmetic unit coupled to the analogue/digital converter.

11. The circuit of claim 10, wherein the voltage detector further includes an operational amplifier having a plurality of resistors.

12. The circuit of claim 10, wherein the first input selector is coupled to a ground potential and the second input selector is coupled to a negative reference voltage.

13. The circuit of claim 12, wherein the first input selector is electrically coupled to a ground potential and the second input selector is electrically coupled to a negative reference voltage.

14. The circuit of claim 10, wherein the first input selector is coupled to a positive reference voltage and the second input selector is coupled to a ground potential.

15. The circuit of claim 14, wherein the first input selector is electrically coupled to a positive reference voltage and the second input selector is electrically coupled to a ground potential.