High voltage boosted word line supply charge pump and regulator for DRAM
DCFirst Claim
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1. A boosted voltage supply comprising:
- DC voltage supply providing plural voltage levels;
a boosting capacitor having first and second terminals; and
a switching circuit including a first switch between one level of the voltage supply and the first terminal of the boosting capacitor and a second switch between the first terminal of the boosting capacitor and a capacitive load, the first and second switches being driven by clock signals, the switching circuit alternately connecting the first terminal of the boosting capacitor to the voltage supply and to the capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the voltage on the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply to provide a boosted voltage supply;
at least one of said first and second switches being controlled by a boosted clock signal gated from the boosted voltage supply; and
the boosted clock signal being generated through cross-coupled transistors having their gates pulled low by separate transistors, the cross-coupled transistors being coupled to the boosted voltage supply.
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Abstract
A circuit for providing an output voltage for a DRAM word line which can be used to drive memory word lines which can be as high as 2Vdd. Transistors in a boosting circuit are fully switched, eliminating the reduction of the boosting voltage by Vtn as in the prior art. The boosting capacitors are charged by Vdd, thus eliminating drift tracking problems associated with clock boosting sources and Vdd. A regulator detects conduction current of a replica of a memory cell access transistor, shutting off the boosting circuit clock oscillator when the correct voltage to operate the access transistor has been reached.
141 Citations
14 Claims
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1. A boosted voltage supply comprising:
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DC voltage supply providing plural voltage levels;
a boosting capacitor having first and second terminals; and
a switching circuit including a first switch between one level of the voltage supply and the first terminal of the boosting capacitor and a second switch between the first terminal of the boosting capacitor and a capacitive load, the first and second switches being driven by clock signals, the switching circuit alternately connecting the first terminal of the boosting capacitor to the voltage supply and to the capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the voltage on the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply to provide a boosted voltage supply;
at least one of said first and second switches being controlled by a boosted clock signal gated from the boosted voltage supply; and
the boosted clock signal being generated through cross-coupled transistors having their gates pulled low by separate transistors, the cross-coupled transistors being coupled to the boosted voltage supply. - View Dependent Claims (2, 3, 4)
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5. A method of supplying a boosted voltage comprising:
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providing plural voltage levels and a boosting capacitor having first and second terminals;
with clock signals applied to switches, alternately switching the first terminal of the boosting capacitor to the voltage supply and to a capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply to provide a boosted voltage supply, at least one of said switches coupled to the first terminal being controlled by a boosted clock signal gated from the boosted voltage level, the boosted clock signal being generated through cross-coupled transistors having their gates pulled low by separate transistors, the cross-coupled transistors being coupled to the boosted voltage supply. - View Dependent Claims (6, 7, 8)
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9. A boosted voltage supply comprising:
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DC voltage supply providing plural voltage levels;
a boosting capacitor having first and second terminals; and
a switching circuit including a first switch between one level of the voltage supply and the first terminal of the boosting capacitor and a P-channel transistor between the first terminal of the boosting capacitor and a capacitive load, the first switch and the P-channel transistor being driven by clock signals, the switching circuit alternately connecting the first terminal of the boosting capacitor to the voltage supply and to the capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the voltage on the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply. - View Dependent Claims (10)
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11. A method of supplying a boosted voltage comprising:
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providing plural voltage levels and a boosting capacitor having first and second terminals; and
with clock signals applied to switches, alternately switching the first terminal of the boosting capacitor to the voltage supply and to a capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply, the switch between the first terminal of the boosting capacitor and the capacitive load being a P-channel transistor. - View Dependent Claims (12)
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13. A boosted voltage supply comprising:
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DC voltage supply providing plural voltage levels;
a boosting capacitor having first and second terminals; and
a switching circuit including a first switch between one level of the voltage supply and the first terminal of the boosting capacitor and a second switch between the first terminal of the boosting capacitor and a capacitive load, the first and second switches being driven by non overlapping clock signals, the switching circuit alternately connecting the first terminal of the boosting capacitor to the voltage supply and to the capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the voltage on the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply.
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14. A method of supplying a boosted voltage comprising:
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providing plural voltage levels and a boosting capacitor having first and second terminals; and
with non overlapping clock signals applied to switches, alternately switching the first terminal of the boosting capacitor to the voltage supply and to a capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply.
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Specification