Read channel circuit for optical disk reproducing apparatus
First Claim
1. A read channel circuit of an optical disk reproducing apparatus comprising a servo processor for generating an offset revision control signal and a pit depth revision control signal for minimizing tracking error signals, the read channel circuit comprising:
- a data converting section for amplifying a plurality of input signals received via different channels and converting the reference signals to digital signals;
a data reproducing section for receiving the digital signals from the data converting section, summing and waveform-equalizing the digital signals to generate waveform-equalized signals, detecting a phase difference between the waveform-equalized signals and reference sampling points, and generating a sampling clock frequency which is supplied to the data converting section for compensating for the phase difference; and
a servo error signal detecting section for receiving the digital signals from the data converting section, delaying the digital signals by phases specified by the offset revision control signal and the pit depth revision control signal to generate delayed signals, summing the delayed signals to generate summed signals, and generating the tracking error signals based on a comparison of phase differences between the summed signals.
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Accused Products
Abstract
A read channel circuit of an optical disk reproducing apparatus is adapted to provide stability in servo control and reduce power consumption by revising the offset component of the circuit components after application of reference signals and then the offset component caused by pit depth resulting from signals read out in reproducing a data from an optical disk. The read channel circuit includes: a data converting section for amplifying signals input via different channels and converting them to digital data. A data reproducing section is provided for summing and waveform-equalizing the digital signals, detecting the phase difference between the waveform-equalized signals and reference sampling points, and generating a sampling clock frequency which is provided to the data converting section for compensating for the phase difference. A servo error signal detecting signal is provided for delaying the signals input from the data converting section by phases specified by the offset revision control signal and the pit depth revision control signal, summing the delayed signals into a plurality of signals, and generating the tracking error signals based on the comparison of phase differences between the summed signals.
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Citations
8 Claims
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1. A read channel circuit of an optical disk reproducing apparatus comprising a servo processor for generating an offset revision control signal and a pit depth revision control signal for minimizing tracking error signals, the read channel circuit comprising:
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a data converting section for amplifying a plurality of input signals received via different channels and converting the reference signals to digital signals;
a data reproducing section for receiving the digital signals from the data converting section, summing and waveform-equalizing the digital signals to generate waveform-equalized signals, detecting a phase difference between the waveform-equalized signals and reference sampling points, and generating a sampling clock frequency which is supplied to the data converting section for compensating for the phase difference; and
a servo error signal detecting section for receiving the digital signals from the data converting section, delaying the digital signals by phases specified by the offset revision control signal and the pit depth revision control signal to generate delayed signals, summing the delayed signals to generate summed signals, and generating the tracking error signals based on a comparison of phase differences between the summed signals. - View Dependent Claims (2, 3, 7)
a plurality of anti-aliasing filters for filtering noise from the input signals received through the different channels; and
a plurality of analog-to-digital converters connected to the anti-aliasing filters for converting the reference signals to digital signals.
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3. The read channel circuit as claimed in claim 1 or 2, wherein the servo error signal detecting section comprises:
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a delay control section for generating delay control signals to delay the digital signals received from the data converting section by phases specified by the offset revision control signal and the pit depth revision control signal;
means for delaying the signals received from the data converting section in accordance with the delay control signals;
a plurality of adders for summing a predetermined number of the delayed signals output from the delaying means; and
a phase detector for detecting a phase difference between summed signals output from the adders to generate the tracking error signals.
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7. The read channel circuit as claimed in claim 1, wherein the servo processor generates the offset revision control signal based on the tracking error signal generated by application of reference signals to the data converting section during an input of driver power, and generates the pit depth revision control signal based on the tracking error signal resulting from the signal read during an optical disk reproduction.
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4. A read channel circuit of an optical disk reproducing apparatus comprising a plurality of division photodiodes for generating input signals A, B, C and D, and a servo processor for generating an offset revision control signal and a pit depth revision control signal for minimizing tracking error signals, the read channel circuit comprising:
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a data converting section for receiving summed signals A+B, C+D and -B+C and converting the summed signals to digital signals A+B, C+D and −
B+C;
a data reproducing section for receiving the digital signals A+B and C+D from the data converting section, generating a waveform-equalized signal by summing and waveform-equalizing the digital signals A+B and C+D, and detecting a phase difference between the waveform-equalized signal and a reference sampling point to generate a sampling clock frequency which is supplied to the data converting section for compensating for the phase difference; and
a servo error signal detecting section for receiving the digital signals A+B, −
B+C and C+D from the data converting section, generating first delayed signals by delaying the digital signals A+B, −
B+C and C+D generated by the data converting section by phases specified by the pit depth revision control signal, generating summed first delay signals by summing the first delayed signals, generating second delayed signals by delaying the summed first delay signals by phases specified by the offset revision control signal, and generating the tracking error signals in based on a comparison of phase differences between the second delayed signals.- View Dependent Claims (5, 6, 8)
anti-aliasing filters for filtering noise from the summed signals A+B, -B+C and C+D; and
analog-to-digital converters receiving the summed signals from the anti-aliasing filters and converting the summed signals to digital signals.
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6. The read channel circuit as claimed in claim 4, wherein the servo error signal detecting section comprises:
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a delay control section for generating an offset revision delay control signal and a pit depth revision delay control signal delayed as much as phases specified by the offset revision control signal and the pit depth revision control signal;
an inverter inverting the digital signal −
B+C to generate a digital signal BC;
first delay means for generating the first delayed signals by delaying the digital signals A+B and C+D output from analog-to-digital converters and the digital signal B−
C generated the inverter based on the pit depth revision delay control signal;
a plurality of adders for summing the first delayed signals generated by the first delay means to generate the summed first delayed signals A+C and B+D;
second delay means for generating the second delayed signals by delaying the summed first delayed signals A+C and B+D output from the adders in accordance with the offset revision delay control signal; and
a phase detector for detecting phase differences between the second delayed signals output from the second delaying means to generate the tracking error signals.
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8. The read channel circuit as claimed in claim 4, wherein the servo processor generates an offset revision control signal based on the tracking error signal generated by application of reference signals to the data converting section during input of driver power, and generates the pit depth revision control signal based on the tracking error signal resulting from the signal read during an optical disk reproduction.
Specification