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Power sequencing in a data processing system

  • US 6,237,103 B1
  • Filed: 09/30/1998
  • Issued: 05/22/2001
  • Est. Priority Date: 09/30/1998
  • Status: Expired due to Term
First Claim
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1. A data processing system, comprising:

  • a plurality of components;

    a power control circuit that, upon system reset, can generate at least one sequencing signal indicating a first sequence in which power is to be supplied to said plurality of components;

    memory that stores power sequencing code and a processor, coupled to said memory, that executes said power sequencing code upon system reset, wherein said power sequencing code can selectively generate at least one sequencing signal indicating a second sequence in which power is to be supplied to said plurality of components; and

    a power supply, coupled to receive said at least one sequencing signal generated by said power control circuit and said at least one sequencing signal generated by said power sequencing code, wherein said power supply supplies power to said plurality of components in said second sequence upon system reset in response to receipt of said at least one sequencing signal generated by said power sequencing code.

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