Method for fabricating ferroelectric capacitor with improved interface surface characteristic
First Claim
1. A method for fabricating a ferroelectric capacitor in ferroelectric memory device, comprising the steps of:
- a) forming a first conductive layer on a semiconductor structure prepared for a formation of the ferroelectric capacitor;
b) forming a ferroelectric layer on said first conductive layer;
c) carrying out a rapid thermal annealing for nucleation in said ferroelectric layer;
d) forming a second conductive layer on said ferroelectric layer; and
e) carrying out a thermal treatment for a grain growth in said ferroelectric layer.
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Abstract
A method for fabricating a ferroelectric capacitor in a ferroelectric memory device includes the steps of forming a first conductive layer on a semiconductor structure prepared for a formation of ferroelectric capacitor, forming a first ferroelectric layer on said first conductive layer, carrying out a rapid thermal annealing for nucleation in said ferroelectric layer, forming a second conductive layer on said ferroelectric layer, and carrying out a thermal treatment for a grain growth in said ferroelectric layer, thereby the interface characteristics are improved, reducing leakage currents and preventing a peeling phenomenon during a following etching process.
16 Citations
10 Claims
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1. A method for fabricating a ferroelectric capacitor in ferroelectric memory device, comprising the steps of:
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a) forming a first conductive layer on a semiconductor structure prepared for a formation of the ferroelectric capacitor;
b) forming a ferroelectric layer on said first conductive layer;
c) carrying out a rapid thermal annealing for nucleation in said ferroelectric layer;
d) forming a second conductive layer on said ferroelectric layer; and
e) carrying out a thermal treatment for a grain growth in said ferroelectric layer. - View Dependent Claims (2, 3, 4)
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5. A method for fabricating a ferroelectric capacitor in a ferroelectric memory device, comprising the steps of:
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a) forming a first conductive layer on a semiconductor structure prepared for a formation of a ferroelectric capacitor;
b) forming a ferroelectric layer having a Bi-layered perovskite structure on said first conductive layer;
c) carrying out a rapid thermal annealing for nucleation in said ferroelectric layer;
d) forming a second conductive layer on said ferroelectric;
e) selectively etching said second conductive layer, said ferroelectric layer and said first conductive layer to form said ferroelectric capacitor;
f) carrying out a thermal treatment for compensating damages caused during an etching process and for promoting a grain growth in said ferroelectric layer;
g) forming an interlayer insulating layer, making planarization flow of said interlayer insulating layer, and carrying out a thermal treatment for a grain growth in said ferroelectric layer; and
h) etching said interlayer insulating layer to expose said second conductive layer, and carrying out a thermal treatment to compensate damages occurred during an etching of said interlayer insulating layer and to promote a grain growth in said ferroelectric layer. - View Dependent Claims (6, 7, 8, 9, 10)
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Specification