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Circuit and method for providing simultaneous transmission of page data in a paging system

  • US 6,239,720 B1
  • Filed: 03/24/1998
  • Issued: 05/29/2001
  • Est. Priority Date: 05/10/1997
  • Status: Expired due to Term
First Claim
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1. In a paging system having a plurality of transmitters each having a respective transmission delay, a plurality of delay compensation circuits each associated with a transmitter and each for individually compensating for the respective transmission delay of each transmitter to provide simultaneous transmission of page data among the plurality of transmitters by using a reference clock signal from a global positioning system (GPS) receiver, each delay compensation circuit comprising:

  • a data bus;

    a latch, connected to said data bus and responsive to a latch input signal, for receiving a signal from said data bus;

    a counter/controller, connected to said data bus and responsive to a reference clock signal received from said GPS receiver (1PPS), for counting a series of pulses of a counter reference clock signal and generating a counter output signal in response thereto, whereby said counter/controller begins counting said pulses of said counter reference clock signal in response to said 1PPS signal; and

    a comparator, connected to said latch and said counter/controller, for receiving said data bus signal from said latch and for generating a delayed 1PPS signal (1PPS′

    ) in response to said data bus signal received from said latch and said counter output signal from said counter/controller.

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