Method of simulating an integrated circuit for error correction in a configuration model, and a computer-readable recording medium

• US 6,240,375 B1
• Filed: 10/27/1998
• Issued: 05/29/2001
• Est. Priority Date: 06/04/1998
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Sonoda, Kenichiro
• Primary Examiner(s): Teska, Kevin J.
• Assistant Examiner(s): Sergent, Douglas W.
• Application Number:
  US09/179,178
• Time in Patent Office: 945 Days
• Field of Search: 703/14, 703/6, 703/2, 716/11, 716/15, 716/16, 716/19, 716/20, 716/21, 700/98, 700/110, 700/118-121
• US Class Current: 703/14
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

The number (Nc) of conductor regions and the number (Ncell(i)) of cells constituting each conductor region (ci) are calculated from the result of a configuration simulation. Each conductor region (ci) is judged whether or not the number (Ncell(i)) of cells thereof is less than a minimum cell count (Ncellmin) for recognition as an electrode or interconnect line. A conductor region (ci) judged that the number (Ncell(i)) of cells is not less than the minimum cell count (Ncellmin) is regarded as the electrode or interconnect line. A conductor region (ci) judged that the number (Ncell(i)) of cells is less than the minimum cell count (Ncellmin) is replaced with a dielectric positioned on a previously set one of the top, bottom, left-hand, right-hand, front and rear sides of the conductor region (ci). For example, it is assumed that Nc=4, Ncell(1)=16, Ncell(2)=8, Ncell(3)=1, Ncell(4)=1, Ncellmin=5 and a conductor region having the number of cells less than the minimum cell count (Ncellmin) is replaced with a dielectric positioned on the top side of the conductor region, conductor regions (c1 and c2) are regarded as electrodes or interconnect lines and conductor regions (c3 and c4) are replaced with a dielectric (ε3). After the processing of all conductor regions are complete, a capacitance simulation, for example, is performed precisely. The influences of errors caused by the configuration simulation using the cells are reduced for execution of another simulation.

Claims

1. A method of simulating an integrated circuit, comprising the steps of:

defining a set of unit regions based on a structure of an integrated circuit, each of said unit regions including information related to a material and a position thereof;

identifying as a conductor region each cell-coupled element comprised of at least one of said unit regions which is made of a conductor material;

calculating a number of unit regions included in said conductor region;

judging, based on the number of unit regions included in said conductor region, if the conductor region satisfies a criterion for regarding said conductor region as an electrode region or an interconnect line region;

replacing the information related to the material of said at least one of said unit regions included in said conductor region with information related to a nonconductor when said conductor region does not satisfy said criterion; and

solving a predetermined equation using the information related to the material and position of said unit regions including said at least one of said unit regions in which the information related to the material has been replaced in said replacing step to determine physical properties of said integrated circuit.

2. The method according to claim 1,

wherein said criterion comprises whether or not the number of unit regions included in said conductor region is greater than or equal to a previously set value.

3. The method according to claim 2,

wherein said set value comprises a product of the total number of unit regions within an entire region to be simulated and a predetermined rate.

4. The method according to claim 2,

wherein said set value comprises a product of a maximum number of unit regions included in any conductor region and a predetermined rate.

5. The method according to claim 1,

wherein said criterion comprises a ranking of said conductor region relative to other conductor regions, said ranking based on the number of unit regions included in a plurality of conductor regions.

11. The method according to claim 1,

wherein, said at least one of said unit regions included in said conductor region being adjacent to surrounding unit regions of said unit regions, said surrounding unit regions having boundaries defining an outermost surface of said at least one of said unit regions included in said conductor region, information related to said at least one of said unit regions being replaced with the information related to the material of one of said surrounding unit regions of said unit regions, the boundary of one of said surrounding unit regions of said unit regions being oriented in a previously set direction.

13. The method according to claim 1, wherein said replacing step comprises the steps of:

determining a boundary between said conductor region not satisfying said criterion and at least one adjacent region adjacent to said conductor region not satisfying said criterion; and

replacing the information related to the material of said conductor region not satisfying said criterion with information related to a type of the material forming said adjacent region having a largest boundary with said conductor region not satisfying said criterion.

6. A method of simulating an integrated circuit, comprising the steps of:

defining a set of unit regions based on a structure of an integrated circuit, each of the unit regions including information related to a material and a position thereof;

identifying as a conductor region each cell-coupled element comprised of at least one of said unit regions which is made of a conductor material; and

calculating the total number of conductor regions and the volume of each conductor region in the case of a three-dimensional simulation and the area of each conductor region in the case of a two-dimensional simulation;

judging whether or not the volume of each conductor region satisfies a criterion for regarding each conductor region as an electrode region or an interconnect line region in the case of said three-dimensional simulation and judging whether or not the area of each conductor region satisfies a criterion for regarding each conductor region as said electrode region or an interconnect line region in the case of said two-dimensional simulation;

replacing the information related to the material of said at least one of said unit regions included in each conductor region with information related to a nonconductor when said conductor region does not satisfy said criterion; and

solving a predetermined equation using the information related to the material and position of said unit regions including said at least one of said unit regions in which the information related to the material has been replaced in said replacing step to determine physical properties of said integrated circuit.

7. The method according to claim 6,

wherein said criterion in the case of said three-dimensional simulation comprises whether or not the volume of each conductor region is greater than or equal to a previously set volume value, and said criterion in the case of said two-dimensional simulation comprises whether or not the area of each conductor region is greater than or equal to a previously set area value.

8. The method according to claim 7,

wherein said set volume value in the case of said three-dimensional simulation comprises a product of the volume of an entire region to be simulated and a predetermined rate, and said set area value in the case of said two-dimensional simulation comprises a second product of the area of the entire region to be simulated and a second predetermined rate.

9. The method according to claim 7,

wherein said set volume value in the case of said three-dimensional simulation comprises a product of a maximum volume of any conductor region and a predetermined rate, and said set area value in the case of said two-dimensional simulation comprises a second product of a maximum area of any conductor region and a second predetermined rate.

10. The method according to claim 6,

wherein said criterion in the case of said three-dimensional simulation comprises a volume ranking of each conductor region relative to other conductor regions, said volume ranking based on the volume of each conductor region, and said criterion in the case of said two-dimensional simulation comprises an area ranking of each conductor region relative to other conductor regions, said area ranking based on the area of each conductor region.

12. The method according to claim 6,

wherein said at least one of said unit regions included in each conductor region to be replaced in said replacing step being adjacent to surrounding unit regions of said unit regions, said surrounding unit regions having boundaries defining an outermost surface of said at least one of said unit regions included in each conductor region, information related to said at least one of said unit regions being replaced with the information related to the material of one of said surrounding unit regions of said unit regions, the boundary of one of said surrounding unit regions of said unit regions being oriented in a previously set direction.

14. The method according to claim 6, wherein said replacing step comprises the steps of:

determining a boundary between each conductor region not satisfying said criterion and at least one adjacent region adjacent to each conductor region not satisfying said criterion; and

replacing the information related to the material of each conductor region not satisfying said criterion with information related to a type of the material forming said adjacent region having a largest boundary.

15. A computer readable recording medium which records thereon a program embodying the steps of:

representing a structure of an integrated circuit with a set of unit regions each including information related to a material and a position thereof;

identifying a conductor region comprised of at least one of said unit regions comprising a conductor;

judging whether or not said conductor region satisfies a criterion for regarding said conductor region as an electrode region or an interconnect line region;

replacing the information related to the material of said at least one of said unit regions included in said conductor region with information related to a nonconductor when said conductor region does not satisfy said criterion; and

solving a predetermined equation using the information related to the material and position of said unit regions including said at least one of said unit regions in which the information related to the material has been replaced in said replacing step to determine physical properties of said integrated circuit.

16. The computer readable recording medium according to claim 15, wherein;

the number of unit regions included in said conductor region being calculated in said representing step; and

said criterion in said judging step comprises whether or not a number of unit regions included in said conductor region is greater than or equal to a previously set value.

17. The computer readable recording medium according to claim 15, wherein;

the number of unit regions included in said conductor region being calculated in said representing ste; and

said criterion in said judging step comprises a ranking of a plurality of conductor regions based on a number of unit regions included in each conductor region.

18. The computer readable recording medium according to claim 15, wherein;

the volume of said conductor region being calculated in said representing step in a three-dimensional simulation, and the area of said conductor region being calculated in said representing step in a two dimensional simulation; and

said criterion in said judging step in said three-dimensional simulation comprises whether or not the volume of said conductor region is greater than or equal to a previously set volume value, and said criterion in said judging step in said two-dimensional simulation comprises whether or not the area of said conductor region is greater than or equal to a previously set area value.

19. The computer readable recording medium according to claim 15, wherein;

the volume of said conductor region is calculated in said representing step in a three-dimensional simulation, and the area of said conductor region is calculated in said representing step in a two-dimensional simulation; and

said criterion in said judging step in said three-dimensional simulation comprises a volume ranking of a plurality of conductor regions, and said criterion in said judging step in said two-dimensional simulation comprises an area ranking of a plurality of conductor regions.