Post gate etch cleaning process for self-aligned gate mosfets

• US 6,242,350 B1
• Filed: 03/18/1999
• Issued: 06/05/2001
• Est. Priority Date: 03/18/1999
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Tao, Hun-Jan, Tsai, Chia-Shiung, Huang, Yuan-Chang
• Primary Examiner(s): POWELL, WILLIAM A
• Application Number:
  US09/270,594
• Time in Patent Office: 810 Days
• Field of Search: 438/690, 438/710, 438/712, 438/714, 438/715, 438/719, 438/720, 438/734, 438/725, 216/67, 216/79, 134/1.1, 134/1.2, 134/1.3
• US Class Current: 438/690
• CPC Class Codes: H01L 21/02071 the processing being a delineation, e.g. RIE, of conductive layers
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 21/32137 of silicon-containing layers

Abstract

A method for removing residual photoresist and polymer residues from silicon wafers after a polysilicon plasma etch with minimal gate oxide loss is described. The method is particularly useful for cleaning wafers after polysilicon or polycide gate etching in MOSFET with when very thin gate oxides (<100Å). In order to etch the final portion of the polysilicon gate structure including an over etch to removed isolated polysilicon patches, an etchant containing HBr is used to provide a high polysilicon to gate oxide selectivity. This etch component causes a polymer veil to form over the surface of the photoresist which is difficult to remove except by aqueous etchants which also cause significant gate oxide loss. The method of the invention addresses the removal of the veil polymer, the photoresist, and a sidewall polymer by an all dry etching process. In a first all dry process, the residues and photoresist and sidewall polymers are removed in a commercial ICP plasma asher by a sequence of steps using O₂/N₂ mixtures and a single O2/fluorocarbon step to remove the veil polymer. An alternate cleaning procedure removes the veil polymer with a O₂/N₂/H₂ gas mixtures at a low substrate temperature and the photoresist and sidewall polymers at a higher temperature. Maximum gate oxide loss by either method is less than 10 Å.

Claims

1. A method for stripping photoresist and cleaning polymer residues from a silicon wafer after plasma etching of a gate electrode comprising:

(a) providing a silicon wafer having;

(i) a gate oxide;

(ii) a conductive layer overlying said gate oxide;

(iii) a photoresist layer overlying said conductive layer and patterned to define a gate electrode;

(b) plasma etching said conductive layer to form a gate electrode;

(c) loading said wafer into an ashing chamber of a plasma asher;

(d) ashing said photoresist and said polymer residues by the steps of;

(i) flowing oxygen in said chamber at for a first time period;

(ii) flowing a first gas mixture containing oxygen and nitrogen in said chamber while initiating and maintaining a gas plasma in said chamber at a first rf power for a second time period;

(iii) flowing a second gas mixture containing oxygen and nitrogen in said chamber while maintaining a gas plasma in said chamber at a second rf power for a third time period;

(iv) flowing a third gas mixture containing oxygen and a fluorine containing gas in said chamber while maintaining a gas plasma in said chamber at a third rf power for a fourth time period;

(v) flowing a fourth gas mixture containing oxygen and nitrogen in said chamber for a fifth time period;

(e) retrieving said wafer from said plasma asher; and

(f) rinsing said wafer in de-ionized water and drying said wafer.

2. The method of claim 1 wherein a portion of said conductive layer is polysilicon.

3. The method of claim 1 wherein said plasma etching of said conductive layer is conducted in a plasma containing HBr.

4. The method of claim 1 wherein said plasma asher is an ICP plasma asher.

5. The method of claim 1 wherein said first gas comprising oxygen is flowed at a rate of between about 1,800 and 2,200 SCCM at a chamber pressure of between about 1.3 and 1.7 Torr and said first time period is 10 seconds or thereabout.

6. The method of claim 1 wherein said plasma asher is configured for a 200 mm. diameter wafer and said first rf power is between about 850 and 1,050 Watts.

7. The method of claim 1 wherein said first gas mixture comprises O₂ at a flow rate of between about 1,800 and 2,200 SCCM and N₂ at a flow rate of between about 150 and 250 SCCM at a chamber pressure of between about 1.0 and 1.2 Torr.

8. The method of claim 1 wherein said second time period is between about 2 and 4 seconds.

9. The method of claim 1 wherein said second gas mixture comprises O₂ at a flow rate of between about 3,600 and 4,400 SCCM and N₂ at a flow rate of between about 150 and 250 SCCM at a chamber pressure of between about 1.0 and 1.2 Torr.

10. The method of claim 1 wherein said plasma asher is configured for a 200 mm. diameter wafer and second rf power is between about 800 and 950 Watts.

11. The method of claim 1 wherein said third time period is between about 40 and 50 seconds.

12. The method of claim 1 wherein said third gas mixture comprises O₂ at a flow rate of between about 2,700 and 3,300 SCCM and said fluorine containing gas at a flow rate of between about 22 and 33 SCCM at a chamber pressure of between about 1.0 and 1.2 Torr.

13. The method of claim 1 wherein said fluorine containing gas is selected from the group consisting of a fluorocarbon, a mixture of fluorocarbons, and NF₃.

14. The method of claim 1 wherein said plasma asher is configured for a 200 mm. diameter wafer and third rf power is between about 800 and 950 Watts.

15. The method of claim 1 wherein said fourth time period is between about 18 and 22 seconds.

16. The method of claim 1 wherein said fourth gas mixture comprises O₂ at a flow rate of between about 1,800 and 2,200 SCCM and N₂ at a flow rate of between about 150 and 250 SCCM at a chamber pressure of between about 1.3 and 1.7 Torr.

17. The method of claim 1 wherein said fifth time period is 10 seconds or thereabout.

18. A method for stripping photoresist and cleaning polymer residues from a silicon wafer after plasma etching a gate electrode comprising:

(a) providing a silicon wafer having;

(i) a gate oxide;

(ii) a conductive layer overlying said gate oxide;

(iii) a photoresist layer overlying said conductive layer patterned to define a gate electrode;

(b) plasma etching said conductive layer to form a gate electrode;

(c) loading said wafer in a chamber of a plasma asher;

(d) removing said photoresist and said polymer residues by the steps of;

(i) heating said wafer to a first temperature;

(ii) flowing a gas mixture containing oxygen, hydrogen, and nitrogen in said chamber while initiating and maintaining a gas plasma in said chamber at a first rf power for a first time period;

(iii) heating said wafer to a second temperature;

(iv) flowing said gas mixture containing oxygen, hydrogen, and nitrogen in said chamber while maintaining a gas plasma in said chamber at a second rf power for a second time period;

(e) retrieving said wafer from said plasma asher; and

(f) rinsing said wafer in de-ionized water and drying said wafer.

19. The method of claim 18 wherein a portion of said conductive layer is polysilicon.

20. The method of claim 18 wherein said plasma etching of said conductive layer is conducted in a plasma containing HBr.

21. The method of claim 18 wherein said plasma asher is an ICP plasma asher.

22. The method of claim 18 wherein said first temperature is between about 120 and 140°

C. and said first time period is between about 80 and 100 seconds.

23. The method of claim 18 wherein said gas mixture comprises O₂ at a flow rate of between about 1,800 and 2,200 SCCM and forming gas at a flow rate of between about 150 and 250 SCCM at a chamber pressure of between about 1.0 and 1.2 Torr.

24. The method of claim 18 wherein said plasma asher is configured for a 200 mm. diameter wafer and said first rf power is between about 850 and 950 Watts and said second rf power is between about 1,000 and 1,200 Watts.

25. The method of claim 18 wherein said second temperature is between about 225 and 275°

C. and said second time period is between about 55 and 65 seconds.