Semiconductor device with a tunnel diode and method of manufacturing same

• US 6,242,762 B1
• Filed: 05/13/1998
• Issued: 06/05/2001
• Est. Priority Date: 05/16/1997
• Status: Expired due to Term

• Current Assignee: Hanger Solutions, LLC (IP Investments Group LLC)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Slotboom, Jan W., De Boer, Wiebe B., Hurkx, Godefridus A. M., Brown, Adam R.
• Primary Examiner(s): Jackson, Jr., Jerome
• Application Number:
  US09/078,231
• Time in Patent Office: 1,119 Days
• Field of Search: 257/104, 257/106, 257/196, 257/199, 257/603, 257/604
• US Class Current: 257/104
• CPC Class Codes: H01L 29/885 Esaki diodes
• CPC Class Codes: Y10S 438/979 Tunnel diodes

Abstract

A semiconductor device with a tunnel diode (23) is particularly suitable for various applications. Such a device comprises two mutually adjoining semiconductor regions (2, 3) of opposed conductivity types and having doping concentrations which are so high that breakdown between them leads to conduction by means of tunnelling. A disadvantage of the known device is that the current-voltage characteristic is not yet steep enough for some applications. In a device according to the invention, the portions (2A, 3A) of the semiconductor regions (2, 3) adjoining the junction (23) comprise a mixed crystal of silicon and germanium. It is surprisingly found that the doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions (2, 3). The tunnelling efficiency is substantially improved as a result of this, and also because of the reduced bandgap of said portions (2A, 3A), and the device according to the invention has a much steeper current-voltage characteristic both in the forward and in the reverse direction. This opens perspectives for inter alia an attractive application where the tunnelling pn junction (23) is used as a transition between two conventional diodes, for example pn or pin diodes, which are used one stacked on the other and which can be formed in a single epitaxial growing process thanks to the invention. The portions (2A, 3A) adjoining the tunnelling junction (22) are preferably 5 to 30 nm thick and comprise between 10 and 50 at % germanium. The doping concentration may be 6×10¹⁹ or even more than 10²⁰ at/cm³. The invention further relates to a simple method of manufacturing a device according to the invention. This is preferably done at a temperature of between 550° C. and 800° C.

Claims

1. A nonoptical semiconductor device with a semiconductor diode comprising a silicon semiconductor body (10) with a monocrystalline semiconductor substrate (1) and a monocrystalline first semiconductor region (2) of a first conductivity type which is provided with a first connection conductor (21) and which adjoins a monocrystalline second semiconductor region (3) of a second conductivity type opposed to the first and provided with a second connection conductor (31), the doping concentrations of both the first and the second semiconductor region (2, 3) being so high that the pn junction (22) between the first semiconductor region (2) and the second semiconductor region (3) forms a stable tunnelling junction (22), wherein the portions (2A, 3A) of the first semiconductor region (2) and of the second semiconductor region (3) which adjoin the junction (22) comprise a mixed crystal of silicon and germanium, and wherein the portions (2A, 3A) of the first semiconductor region (2) and the second semiconductor region (3) which adjoin the tunnelling junction (22) have a doping concentration of at least approximately 5×

10¹⁹ at/cm³.

2. A semiconductor device as claimed in claim 1, characterized in that the portions (2A, 3A) of the first semiconductor region (2) and the second semiconductor region (3) which adjoin the tunnelling junction (22) have a thickness which lies between 5 and 30 nm and a germanium content which lies between 10 and 50 at %.

3. A semiconductor device as claimed in claim 1, characterized in that further semiconductor regions (4, 5) are present between the first semiconductor region (2) and the first connection conductor (21) or between the second semiconductor region (3) and the second connection conductor (31), forming one or several further pn junctions (23) which are forward biased when the tunnelling pn junction (22) is reverse biased and which are separated from one another by two other further semiconductor regions (6, 7) having the same properties as the first semiconductor region (2) and the second semiconductor region (3) and forming a further tunnelling pn junction (24).

4. A semiconductor device as claimed in claim 3, characterized in that one of the further semiconductor regions (4, 5) is not doped.

5. A semiconductor device as claimed in claim 1 characterized in that the semiconductor regions (2, 3, 4, 5, 6, 7, 8, 9) comprise monocrystalline epitaxial semiconductor layers (2, 3, 4, 5, 7, 7, 8, 9) stacked on top of one another.

6. A semiconductor device as claimed in claim 1 characterized in that the first semiconductor region (2) is of the p-type conductivity type.