Volume rendering pipelines

• US 6,243,098 B1
• Filed: 05/25/1999
• Issued: 06/05/2001
• Est. Priority Date: 08/01/1997
• Status: Expired due to Term

• Current Assignee: TeraRecon Inc. (Fortive Corp.)
• Original Assignee: TeraRecon Inc. (Fortive Corp.)
• Inventors: Pfister, Hanspeter, Osborne, Randy B., Lauer, Hugh C.
• Primary Examiner(s): Vo, Cliff N.
• Application Number:
  US09/318,344
• Time in Patent Office: 742 Days
• Field of Search: 345/418, 345/419, 345/423, 345/424, 345/425, 345/427
• US Class Current: 345/424
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 15/08 Volume rendering
• CPC Class Codes: G06T 15/40 Hidden part removal

Abstract

An apparatus renders a volume data set including a plurality of voxels stored in a voxel memory. The apparatus includes a plurality of pipelines operating in parallel. Each pipeline includes a buffer storing at least one block of at least two voxels of the volume data set. An interpolation stage reads the at least one block of at least two voxels from the buffer. A gradient estimation stage receives an output from the interpolation stage. A compositing stage receives an output from the gradient estimation stage. The apparatus also includes a plurality of interface devices, wherein each interface device couples a particular stage only to an adjacent identical stage in a neighboring pipeline so that identical stages of the pipelines are connected in a ring.

Claims

1. An apparatus for rendering a volume data set including a plurality of voxels stored in a voxel memory, the apparatus comprising a plurality of pipelines operating in parallel, each pipeline comprising:

a buffer storing at least one block of at least two voxels of the volume data set;

an interpolation stage reading the at least one block of at least two voxels from the buffer;

a gradient estimation stage receiving an output from the interpolation stage;

a compositing stage receiving an output from the gradient estimation stage; and

a plurality of interface devices, each interface device coupling a particular stage only to an adjacent identical stage in a neighboring pipeline, the interfaces coupling identical stages in a ring.

2. The apparatus of claim 1 wherein each interface device comprises a first tri-state interface device and a second tri-state interface device.

3. The apparatus of claim 1 implemented in a volume graphics system comprising P pipelines, wherein the volume data set comprises L×

M×

N voxels and each block comprises B³ voxels, wherein the buffer is configured to store (L×

M)÷

(B²×

P) elements, where each element comprises an array of B×

(B+1) voxels.

4. The apparatus of claim 1, wherein the volume data set is arranged as a plurality of beams of voxels, and wherein the buffer stores one beam of voxels.

5. The apparatus of claim 4 implemented in a volume graphics system comprising P pipelines, wherein the volume data set comprises L×

M×

N voxels of data, and wherein the buffer is configured to store L÷

(B×

P) elements, wherein each element is an array of B×

(B+1)² voxels.

6. The apparatus of claim 1 wherein the volume data set is arranged as a plurality of slices, and wherein the buffer stores one slice of voxels.

7. The apparatus of claim 6 implemented in a volume graphics system comprising P volume rendering pipelines, wherein the volume data set comprises L×

M×

N voxels and each block comprises B³ voxels, wherein the buffer is configured to store (L×

M)÷

(B²×

P) elements, where each element is an array of 2×

B×

(B+2) voxels.

8. The apparatus of claim 1, further comprising:

a delay unit coupled between a previous stage and a next stage of the same pipeline for temporary storage of output from the previous stage.

9. The apparatus of claim 1 further comprising pixel memory receiving an output of the compositing stage.

10. A method for rendering a volume data set including a plurality of voxels stored in a voxel memory, comprising the steps of:

storing blocks of at least two voxels of the volume data set in a buffer;

processing multiple blocks, in parallel, in a plurality of pipelines connected to the buffer, the processing in each pipeline comprising the steps of;

interpolating each block read from the buffer in a first stage of the pipeline to produce samples;

estimating a gradient for each sample in a second stage of the pipeline;

compositing the samples and gradients in a third stage of the pipeline to produce pixels; and

interfacing a particular stage only to one adjacent identical stage in a neighboring pipeline, the interfacing coupling identical stages in a ring.