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Nonvolatile semiconductor memory

  • US 6,243,295 B1
  • Filed: 03/16/2000
  • Issued: 06/05/2001
  • Est. Priority Date: 03/19/1999
  • Status: Expired due to Fees
First Claim
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1. A nonvolatile semiconductor memory comprising:

  • a NAND cell series having one and another ends, and said NAND cell series including a plurality of memory cells connected in series;

    a first select gate transistor connected between the one end of said NAND cell series and a bit line; and

    a second select gate transistor connected between the another end of said NAND cell series and a source line, wherein each of the plurality of memory cells consists of a main transistor, and parasitic transistors that sandwich said main transistor, and said main transistor and said parasitic transistors share a gate electrode, and threshold values of said parasitic transistors are higher than a threshold value of said main transistor.

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