Fibre channel learning bridge, learning half bridge, and protocol

• US 6,243,386 B1
• Filed: 09/14/1999
• Issued: 06/05/2001
• Est. Priority Date: 01/23/1997
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Gadzoox Networks, Inc. (Broadcom, Inc.)
• Inventors: Black, Alistair D., Chan, Kurt
• Primary Examiner(s): VU, HUY DUY
• Application Number:
  US09/395,644
• Time in Patent Office: 630 Days
• Field of Search: 370/401, 370/402, 370/400, 370/403, 370/404, 370/405, 370/406, 370/408, 370/468, 359/109, 359/117, 359/115, 709/249, 709/250, 709/251, 709/253
• US Class Current: 370/403
• CPC Class Codes: H04L 12/40084 Bus arbitration
• CPC Class Codes: H04L 12/4625 Single bridge functionality, e.g. connection of two networks over a single bridge
• CPC Class Codes: H04L 12/4637 Interconnected ring systems
• CPC Class Codes: H04L 49/103 using a shared central buffer; using a shared memory
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/30 Peripheral units, e.g. input or output ports
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: H04L 49/40 Constructional details, e.g. power supply, mechanical construction or backplane
• CPC Class Codes: H04N 21/4341 Demultiplexing of audio and video streams

Abstract

A learning half bridge and bridge for a Fibre Channel Arbitrated Loop and switching protocol. A half bridge can be coupled to a local loop segment and a remote loop segment. The half bridge includes transmit and receive ports implementing predetermined switching and conflict resolution rules and a memory storing a forwarding table. Typically the switching rules are implemented using state machines. The state machines implement a switching protocol that controls transitions between states which control switching connections, writing of data to memory and reading of data from memory and preemption of conflicting OPN primitives. Each half bridge includes a local return segment that can be switched by the state machines to bypass the remote loop segment if both the source node and destination node are on the local loop segment so as to make the local loop segment a complete Fibre Channel Arbitrated Loop. Each half bridge learns the locations of nodes by watching the direction of flow, the loop segment from which certain primitives arrived and sequence of OPN, RRDY and CLS primitives propagating on the loop segments and records data in the forwarding table in memory reflecting the locations of nodes about which conclusions have been drawn in accordance with learning rules. A learning bridge is comprised of two half bridges having their remote loop segments cross coupled. Full bridges can be combined with accelerated or nonaccelerated hubs. Conflicting OPNs are preempted using a highest priority address rule.

Claims

1. A bridge for a Fibre Channel Arbitrated Loop, comprising:

a first half bridge comprising a transmit port, a receive port and a memory coupled at least to said receive port, said memory for storing data of a forwarding table, said transmit and receive ports each coupled to each other by a plurality of control signals and having local TX and RX ports for coupling to a first local fibre channel arbitrated loop, hereafter referred to as said first FC-AL loop segment, and said transmit and receive ports each coupled to a local FC-AL return segment such that loop tenancies where the source and destination node are both on said first local FC-AL loop segment can be kept local to said first half bridge by routing primitives and data frames of said loop tenancy through said local FC-AL return segment;

a second half bridge comprising a transmit port, a receive port and a memory coupled at least to said receive port, said memory for storing data of a forwarding table, said transmit and receive ports for coupling to a second fibre channel arbitrated loop, hereafter referred to as said second FC-AL loop segment, and said transmit and receive ports each coupled to a local FC-AL return segment such that loop tenancies where the source and destination node are both on said second FC-AL loop segment can be kept local to said second half bridge by routing primitives and data frames of said loop tenancy through said local FC-AL return segment; and

wherein said first and second half bridges each have a remote TX FC-AL output and a remote RX FC-AL input for coupling each half bridge to the FC-AL loop segment coupled to the other half bridge through the other half bridge, said remote RX FC-AL input of said first half bride coupled to said remote TX FC-AL output of said second half bridge, and said remote TX FC-AL output of said first half bridge coupled to said remote RX FC-AL input of said second half bridge;

and wherein each of said first and second half bridges includes control circuitry including at least one state machine or programmed microprocessor to do the necessary switching to carry out arbitration and flow control protocols to implement purely local loop tenancies involving the transmission of FC-AL primitives and data frames around said first and second FC-AL loop segments and said local FC-AL return segment and bridged loop tenancies involving transmission of FC-AL primitives and data frames between said first and second FC-AL loop segments via said first and second half bridges such that two purely local loop tenancies may simultaneously occur, but to couple said first and second FC-AL loop segments together as one larger FC-AL loop segment when source and destination nodes are located on different ones of said first and second FC-AL loop segments, said control circuitry also functioning to learn addresses of nodes on said first and second FC-AL loop segments by watching the sequence of FC-AL primitives that arrive at said ports and draw inferences therefrom as to the locations of said nodes on said first and second FC-AL loop segments coupled to either said first half bridge or said second half bridge and update forwarding table data in said memory, and said control circuitry further functioning to detect situations involving conflicting OPN primitives from different source nodes or the same source node arriving within a short time of each other at different ports of either said first or second half bridge and resolve said conflicting OPN situations using predetermined rules of resolution and an address comparator having first and second address inputs coupled to said transmit and receive ports of said half bridge experiencing said conflicting OPN situation.

2. The apparatus of claim 1 wherein said transmit port of each half bridge comprises:

a local TX port output for coupling to an input of said local FC-AL loop segment;

an Insertion/Substitution/Deletion FIFO Circuit having a data input and an address input and a data output coupled to said local TX port output, and having a plurality of control signal inputs;

a TX Port State Machine forming part of said control circuitry and coupled to said plurality of control signal inputs of said Insertion/Substitution/Deletion FIFO Circuit and having a plurality of control inputs at which a plurality of control signals are received from said receive port and said address comparator, said collection of control signals appearing at said plurality of control inputs controlling the state entered by said state machine, and having a plurality of control outputs at which a plurality of control signals are generated by said state machine in response to the states entered thereby to control operations of said bridge, said TX Port State Machine for generating said plurality of control signals at said plurality of control outputs in response to control signals received at said plurality of control inputs to cooperate with said receive port, said address comparator, said Insertion/Substitution/Deletion FIFO Circuit and said memory to control said half bridge to implement predetermined rules of switching, learning and resolution of situations where conflicting FC-AL OPN primitives are received;

a remote RX port input;

an FC-AL local segment return input coupled to said local FC-AL return segment;

a switch having one output and first and second inputs, said output coupled to said data input of said Insertion/Substitution/Deletion FIFO, said first input coupled to said FC-AL local segment return input, said second input coupled to said remote RX FC-AL input, and having a switch control input coupled to receive a switch control signals from said TX Port State Machine which controls whether said first or second input is coupled to said output;

an AL_PA latch having a data input coupled to said remote RX FC-AL input and having an address output coupled to said address input of said Insertion/Substitution/Deletion FIFO Circuit, and coupled to said first address input of said address comparator for using address data stored in said AL-PA latch in resolving conflicting OPN situations, and having a control input coupled to said TX Port State Machine for receiving a Clear signal to clear any address stored in said AL_PA latch at predetermined times;

a Remote Decode Circuit having an input coupled to said remote RX FC-AL input and having a plurality of control outputs coupled to some of said plurality of control signal inputs of said TX Port State Machine, said remote decode circuit functioning to determine the type of FC-AL primitive received and generate one or more control signals at said control outputs telling said TX Port State Machine which types of FC-AL primitives have appeared at said remote RX FC-AL input as each said primitive arrives, and having a control signal output coupled to said control input of said AL_PA latch for controlling when said AL_PA latch latches AL-PA address data which arrives with an FC-AL OPN primitive arriving at said remote RX FC-AL input; and

a Local Decode Circuit having an input coupled to said FC-AL local segment return input and having a plurality of control outputs coupled to said TX Port State Machine, and having a control input coupled to one of said plurality of control outputs of said TX Port State Machine for receiving said Clear signal, said Local Decode Circuit functioning to detect the type of FC-AL primitives that arrive at said FC-AL local segment return input and generate one or more control signals at said control outputs to tell said TX Port State Machine the type of FC-AL primitive that arrived as each said primitive arrives.

3. The apparatus of claim 1 wherein said receive port of each half bridge comprises:

a remote TX port output coupled to said remote TX FC-AL output of said half bridge;

an Insertion/Substitution/Deletion FIFO Circuit having a data input and a data output and having a plurality of control signal inputs;

an RX Port State Machine forming part of said control circuitry and having a first plurality of control outputs coupled to said plurality of control signal inputs of said Insertion/Substitution/Deletion FIFO Circuit, and having a second plurality of control signals ouputs coupled to said memory for carrying control signals to said memory to control operation thereof, and having a plurality of control inputs at which a plurality of control signals and data are received from said transmit port, said memory and said address comparator, said collection of control signals appearing at said plurality of control inputs controlling the state entered by said state machine, and having a plurality of control signal outputs at which a plurality of control signals outputs are generated by said state machine in the various states entered thereby, said RX Port State Machine for generating said plurality of control signals at said plurality of control outputs in response to control signals received at said plurality of control inputs to cooperate with said transmit port, said address comparator, said Insertion/Substitution /Deletion FIFO Circuit in said receive port and said memory to control said half bridge to implement predetermined rules of switching, learning and resolution of situations where conflicting FC-AL OPN primitives are received;

a local RX port input coupled to said input of said Insertion/Substitution/Deletion FIFO Circuit, for coupling to an output of said local FC-AL loop segment;

an FC-AL local segment return output coupled to an input of said local FC-AL return segment;

a switch having one input and first and second outputs, said input coupled to said data output of said Insertion/Substitution/Deletion FIFO, said first output coupled to said FC-AL local segment return output, said second output coupled to said remote TX port output, and having a control input coupled to said RX Port State Machine for receiving a switch control signal which controls whether said first or second output is coupled to said input;

an AL_PA latch having a data input coupled to said local RX port input for receiving data and primitives and having an output coupled to said data input of said Insertion/Substitution /Deletion FIFO Circuit, and having an address output coupled to and address input of said memory and to said second address input of said address comparator for providing address data stored in said AL-PA latch in resolving conflicting OPN situations and for assisting in the process of writing data into said forwarding table, and having a plurality of control inputs coupled to said RX Port State Machine for receiving a Clear signal at predetermined times to clear address data stored in said AL_PA latch and an RX Convert signal which causes said AL_PA latch to substitute predetermined address data for the source address of a half-duplex OPN primitive source address stored in said AL_PA latch to convert said OPN primitive to a pseudo-full-duplex OPN primitive to assist in the process of resolving any conflicting OPN situations, and having a control signal input for receiving a latch control input signal to cause said AL_PA latch to latch the AL_PA address of an OPN primitive arriving at said local RX port input; and

a Decode Circuit having an input coupled to said local RX port input and having a plurality of control outputs coupled to said control inputs of said RX Port State Machine at which said Decode Circuit generates one or more control signals in response to receipt of various FC-AL primitives at said local RX port input, said control signals telling said RX Port State Machine what types of FC-AL primitives have arrived at said local RX port input as each said primitive arrives, and having a control signal ouput coupled to said control input of said AL_PA latch to generate said latch control input signal to control when said AL_PA latch latches address data appearing at said local RX port input.

4. The apparatus of claim 2 wherein said receive port of each half bridge comprises:

a remote TX port output coupled to said remote TX FC-AL output of said half bridge;

an Insertion/Substitution/Deletion FIFO Circuit having a data input and a data output and having a plurality of control signal inputs;

an RX Port State Machine forming part of said control circuitry and having a first plurality of control outputs coupled to said plurality of control signal inputs of said Insertion/Substitution/Deletion FIFO Circuit, and having a second plurality of control signals ouputs coupled to said memory for carrying control signals to said memory to control operation thereof, and having a plurality of control inputs at which a plurality of control signals and data are received from said transmit port, said memory and said address comparator, said collection of control signals appearing at said plurality of control inputs controlling the state entered by said state machine, and having a plurality of control signal outputs at which a plurality of control signals outputs are generated by said state machine in the various states entered thereby, said RX Port State Machine for generating said plurality of control signals at said plurality of control outputs in response to control signals received at said plurality of control inputs to cooperate with said transmit port, said address comparator, said Insertion/Substitution/Deletion FIFO Circuit in said receive port and said memory to control said half bridge to implement predetermined rules of switching, learning and resolution of situations where conflicting FC-AL OPN primitives are received;

a local RX port input coupled to said input of said Insertion/Substitution/Deletion FIFO Circuit, for coupling to an output of said local FC-AL loop segment;

an FC-AL local segment return output coupled to an input of said local FC-AL return segment;

a switch having one input and first and second outputs, said input coupled to said data output of said Insertion/Substitution/Deletion FIFO, said first output coupled to said FC-AL local segment return output, said second output coupled to said remote TX port output, and having a control input coupled to said RX Port State Machine for receiving a switch control signal which controls whether said first or second output is coupled to said input;

an AL_PA latch having a data input coupled to said local RX port input for receiving data and primitives and having an output coupled to said data input of said Insertion/Substitution/Deletion FIFO Circuit, and having an address output coupled to and address input of said memory and to said second address input of said address comparator for providing address data stored in said AL-PA latch in resolving conflicting OPN situations and for assisting in the process of writing data into said forwarding table, and having a plurality of control inputs coupled to said RX Port State Machine for receiving a Clear signal at predetermined times to clear address data stored in said AL_PA latch and an RX Convert signal which causes said AL_PA latch to substitute predetermined address data for the source address of a half-duplex OPN primitive source address stored in said AL_PA latch to convert said OPN primitive to a pseudofull-duplex OPN primitive to assist in the process of resolving any conflicting OPN situations, and having a control signal input for receiving a latch control input signal to cause said AL_PA latch to latch the AL_PA address of an OPN primitive arriving at said local RX port input; and

a Decode Circuit having an input coupled to said local RX port input and having a plurality of control outputs coupled to said control inputs of said RX Port State Machine at which said Decode Circuit generates one or more control signals in response to receipt of various FC-AL primitives at said local RX port input, said control signals telling said RX Port State Machine what types of FC-AL primitives have arrived at said local RX port input as each said primitive arrives, and having a control signal ouput coupled to said control input of said AL_PA latch to generate said latch control input signal to control when said AL_PA latch latches address data appearing at said local RX port input.

5. An apparatus as defined in claim 1 further comprising:

a first FC-AL loop segment coupled to said local TX and RX ports of said first half bridge;

a second FC-AL loop segment coupled to said local TX and RX ports of said second half bridge; and

a plurality of NL_nodes coupled to each of said first and second FC-AL loop segments, each said NL_node having an address and a priority for purposes of arbitration.

6. A Fibre Channel Arbitrated Loop network including a bridge, comprising:

a local loop segment for carrying FC-AL traffic and having a plurality of nodes thereon and having first and second ends;

a remote loop segment for carrying FC-AL traffic and having a plurality of nodes thereon and having first and second ends;

a first half bridge having a TX port coupled to said first end of said local loop segment and an RX port coupled to said second end of said local loop segment and having a local segment return data path coupling said RX port to said TX port, said TX port having a Remote RX Port, and said RX port having a Remote TX Port;

a second half bridge having a TX port coupled to said first end of said remote loop segment and an RX port coupled to said second end of said remote loop segment and having a local segment return data path coupling said RX port to said TX port, said TX port having a Remote RX Port which is coupled to said Remote TX Port of said left half bridge by a first FC-AL data path, and said RX port having a Remote TX Port coupled to said Remote RX Port of said left half bridge by a second FC-AL data path;

and wherein each of said first and second half bridges includes means for learning the locations of the nodes on said local and remote loop segments by monitoring FC-AL traffic and destination addresses included in OPN primitives in said FC-AL traffic on said loop segments and data paths to which each bridge is coupled and drawing conclusions from the sequence of primitives and data frames in said traffic and the loop segments or data paths on which various primitives or data frames were seen in sequence and building a table of forwarding data in a memory, and for using said forwarding data to control switching of FC-AL traffic through said local segment return data paths whenever a half bridge knows both the source and destination nodes are on the loop segment to which the half bridge is coupled;

and wherein each of said first and second half bridges includes means for resolving conflicts where two FC-AL OPN primitives are received at different ports of the same half bridge simultaneously or within a short time of each other.

7. A method of controlling the flow of primitives and data frames in a Fibre Channel Arbitrated Loop (hereafter FCAL) network, said bridge comprising a first half bridge having local TX and RX ports and remote RX and TX ports and a second half bridge having local TX and RX ports and remote RX and TX ports, said remote RX and TX ports of said second half bridge coupled to said remote TX and RX ports, respectively, of said first half bridge by transmit and receive FCAL segments, each half bridge also being coupled to a local FCAL loop segment having one or more NL_nodes thereon via said local RX and TX ports and each half bridge coupled to a local FCAL segment return which said half bridge can couple to said local FCAL loop segment to complete the loop thereof when necessary to carry the primitives and data frames of a purely local loop tenancy, comprising:

in each half bridge, receiving FCAL OPN primitives from nodes located on said local FCAL loop segment and FCAL OPN primitives arriving from the other half bridge via said remote RX ports;

resolving any conflicting OPN situations where two FCAL OPN primitives arrive at different ports of the same half bridge simultaneously or within a short time of each other by preempting one of said OPNs according to predetermined rules and taking predetermined action, including, if necessary, arbitration for control of any FCAL loop segment onto which said FCAL OPN is to be transmitted, and carrying out predetermined steps to establish a loop tenancy, or resolving said conflicting OPN situation by determining that the FCAL OPN primitive arriving second in time is the same FCAL OPN as an FCAL OPN previously transmitted out another port of the same half bridge and carrying out predetermined steps to establish a loop tenancy depending upon whether the first FCAL OPN which arrived at said half bridge arrived at said local RX port or at said remote RX port; and

if there is no conflicting OPN situation, using a destination address identifying the NL_node to which said FCAL OPN is bound included in said FCAL OPN to look up in a forwarding table the location of said destination NL_node, and arbitrating for control of the FCAL loop segment coupled to said other half bridge and forwarding the FCAL OPN primitive to the destination NL_node node on the local FCAL loop segment coupled to said other half bridge if the location of the destination NL_node identified in said FCAL OPN primitive is known to be on the local loop of the other half bridge from data in said forwarding table or forwarding said FCAL OPN if the location of said destination NL_node is unknown because there is no data giving the location of the destination NL_node in said forwarding table, or, if the destination node is shown from data in said forwarding table to be on the local FCAL loop segment of the half bridge that received the FCAL OPN primitive and said FCAL OPN primitive was received at said local RX port of said half bridge, forwarding said FCAL OPN onto the local FCAL loop segment coupled to said half bridge which received said FCAL OPN primitive at its local RX port via the local FCAL segment return coupled to that half bridge, or, if the destination node of said FCAL OPN primitive is shown from data in said forwarding table to be on the local FCAL loop segment of the half bridge that received the FCAL OPN primitive at its remote RX port, arbitrating for control of said local FCAL loop segment coupled to said half bridge which received said FCAL OPN primitive at its remote RX port, and, after control is won, forwarding said FCAL OPN primitive onto the local FCAL loop segment.

8. The method of claim 7 wherein said step of resolving any conflicting OPN situation is carried out in any of the following ways:

(1) if a local FCAL OPN is received at said local RX port of either said first or second half bridges which is directed to an NLport on the local FCAL loop segment coupled to the other half bridge and is forwarded to the other half bridge followed by receipt of a remote FCAL OPN primitive at said remote RX port of the same half bridge which previously received said local FCAL OPN, converting any said FCAL OPN that is half-duplex to pseudo-full duplex and comparing AL_PA addresses of said local and remote OPNs and sending out a preemptive FCAL CLS primitive to the source NL_node which generated the lower priority FCAL OPN primitive;

(2) if a local FCAL OPN is received at said local RX port of either said first or second half bridges and is forwarded across said local FCAL segment return, followed by receipt of a remote FCAL OPN primitive at the remote RX port of said half bridge which previously received said local FCAL OPN, sending a preemptive FCAL CLS primitive to the source NL_node which generated said remote FCAL OPN primitive;

(3) if a remote FCAL OPN primitive is received at the remote RX port of either half bridge simultaneously with receipt at the same half bridge of a local FCAL OPN primitive at its local RX port, converting either FCAL OPN primitive that is half-duplex to pseudo-full-duplex, and comparing the AL_PA addresses in the local and remote FCAL OPN primitives, and sending a preemptive CLS to the source NL_node which generated the FCAL OPN of lower priority;

(4) if a remote FCAL OPN primitive is received at the remote RX port of either half bridge followed by receipt at the same half bridge of a local FCAL OPN primitive at its local RX port, sending a preemptive FCAL CLS primitive to the source NL_node which generated said remote FCAL OPN primitive;

(5) if a local FCAL OPN primitive is received at the local RX port of either half bridge and is forwarded to the other half bridge because the destination address of said FCAL OPN primitive is not found in said forwarding table, and the same said local FCAL OPN primitive is returned to the remote RX port of the half bridge which forwarded it, determining the that FCAL OPN primitive just received at said remote RX port is the same FCAL OPN primitive that was previously forwarded by comparing at least the source addresses of said FCAL OPNs, and forwarding said FCAL OPN received at said remote RX port onto said local FCAL loop segment coupled to said local RX and TX ports of said half bridge which previously forwarded said local FCAL OPN to the other half bridge; and

(6) if a remote FCAL OPN primitive is received at the remote RX port of either half bridge and, is forwarded onto the local FCAL loop segment of that half bridge after arbitration for control of said local FCAL loop segment, and shortly thereafter an FCAL OPN primitive arrives at said local RX port of said half bridge which forwarded said remote FCAL OPN primitive onto its local FCAL loop segment, determining if the FCAL OPN that arrived at said local RX port is the same FCAL OPN previously forwarded onto said local FCAL loop segment by comparing at least the source addresses of said remote FCAL OPN primitive and the FCAL OPN primitive that arrived at said local RX port, and if they are not the same, resolving the conflict as in step (4) above, but if said FCAL OPN primitives are the same FCAL OPN primitive, switching the bridge which received said remote FCAL OPN primitive into transparent mode such that all FCAL primitives, fill words and data frames received at said remote RX port are passed unchanged directly through said bridge and back to the other half bridge via said remote TX port.

9. A method of forwarding data between nodes on a Fibre Channel Arbitrated Loop divided into first and second local loop segments coupled by a bridge comprised of a first half bridge coupled to said first local loop segment and a second half bridge coupled to said first half bridge and coupled to said second local loop segment, each half bridge having a local return segment which can be switched by said half bridge so as to be coupled to the local loop segment coupled to that bridge so as to convert each local loop segment into a complete Fibre Channel Arbitrated Loop, each local loop segment having a plurality of nodes each of which has a unique address which is a destination address when data is being transmitted to that node and which is a source address when data is being transmitted from that node to some other node, comprising:

watching propagation of OPN, RRDY and CLS primitives between said first and second local loop segments and drawing conclusions as to on which of said first and second local loop segments various destination addresses and source addresses the locations of which have been learned can be found by examining which primitives arrived from which local loop segment and in what order and recording data in a forwarding table which indicates on which local loop segment destination addresses whose locations have been learned can be found;

switching said local return segments in said first half bridge appropriately such that when both the source address and destination address of a transaction are on the first local loop segment, said local return segment of said first half bridge is coupled to said first local loop segment so as to convert it to a complete Fibre Channel Arbitrated Loop;

switching said local return segments in said second half bridge appropriately such that when both the source address and destination address of a transaction are on the second local loop segment, said local return segment of said second half bridge is coupled to said second local loop segment so as to convert it to a complete Fibre Channel Arbitrated Loop; and

resolving any conflicting OPN situations where two OPNs are received at different ports of the same half bridge simultaneously or within a short time of each other by preempting one OPN if the OPNs are from different source nodes or, if the OPNs are from the same source node, taking appropriate steps to establish a loop tenancy.