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Dynamic buffer allocation for a computer system

  • US 6,243,769 B1
  • Filed: 07/18/1997
  • Issued: 06/05/2001
  • Est. Priority Date: 07/18/1997
  • Status: Expired due to Term
First Claim
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1. In a computer system, a method for concurrently transferring data between a processor and a plurality of peripheral devices via a dynamic buffer allocation system comprising a plurality of address buffers and a plurality of data buffers, wherein each of said plurality of address buffers is exclusively associated with one of said plurality of data buffers, the method comprising the acts of:

  • latching a processor write request comprising an address location in a first peripheral device into a first address buffer of the dynamic buffer allocation system;

    latching a processor read request comprising an address location to be read from a second peripheral device into a second address buffer of the dynamic buffer allocation system;

    sending said processor read request from said second address buffer to said second peripheral device; and

    concurrently transferring data from said processor to a first data buffer of the dynamic buffer allocation system associated with said first address buffer and from said second peripheral device to a second data buffer of the dynamic buffer allocation system associated with said second address buffer.

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