Lead frame

• US 6,246,106 B1
• Filed: 07/03/1997
• Issued: 06/12/2001
• Est. Priority Date: 07/05/1996
• Status: Expired due to Fees

• Current Assignee: Hitachi Cable Limited (Proterial Ltd.)
• Original Assignee: Hitachi Cable Limited (Proterial Ltd.)
• Inventors: Sugimoto, Hiroshi, Yoshioka, Osamu, Taketani, Noriaki, Hagiya, Shigeo, Yonemoto, Takaharu
• Primary Examiner(s): POTTER, ROY KARL
• Application Number:
  US08/886,976
• Time in Patent Office: 1,440 Days
• Field of Search: 257/666, 257/676, 257/787, 257/660, 257/672
• US Class Current: 257/666
• CPC Class Codes: H01L 23/4951 Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A lead frame is provided which enables a coating of an insulating adhesive for fixing a semiconductor chip to be evenly and thickly foamed on inner leads. In a lead frame wherein an insulating adhesive for fixing a semiconductor chip is applied to a semiconductor chip mounting region, inner leads 1 are set to a value of w/s of not more than 1 wherein w represents the lead width and s represents the lead spacing.

Claims

1. A lead frame comprising inner leads coated at predetermined positions with insulative adhesives for fixing a semiconductor chip on said predetermined positions of said inner leads;

each of said inner leads having an identical shape to each other, each of said inner leads being spaced apart from an adjacent one of said inner leads by an identical spacing, and each of said inner leads having a width in a range from about 0.2 mm to about 0.4 mm with said width being not greater than said spacing.

2. A lead frame comprising inner leads coated by using a dispenser at predetermined positions thereof with a layer consisting of insulative adhesive for fixing a semiconductor chip on said predetermined positions of said inner leads;

each of said inner leads having an identical shape to each other, each of said inner leads being spaced apart from an adjacent one of said inner leads by an identical spacing, and each of said inner leads having a width in a range from about 0.2 mm to about 0.4 mm with said width being not greater than said spacing.