Application specific integrated circuit (ASIC) for driving an external display device

• US 6,246,398 B1
• Filed: 06/24/1998
• Issued: 06/12/2001
• Est. Priority Date: 12/15/1997
• Status: Expired due to Term

• Current Assignee: Magnachip Semiconductor Limited (Magnachip Semiconductor)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Koo, Si-Gyung
• Primary Examiner(s): Hjerpe, Richard
• Assistant Examiner(s): Laneau, Ronald
• Application Number:
  US09/103,575
• Time in Patent Office: 1,084 Days
• Field of Search: 345/204, 345/211, 345/212, 345/73
• US Class Current: 345/204
• CPC Class Codes: G09G 3/18 using liquid crystals
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A display apparatus is provided that enables an output of an application specific integrated circuit (IC) to be externally displayed without an additional driving device or an interface coupled to the additional driving device. The external display apparatus for an application specific IC includes an application specific integrated circuit, a converting unit disposed in the application specific integrated circuit for converting a two-level signal outputted from the application specific integrated circuit to a plurality of four(or more)-level signals, and a display unit for externally displaying respective output values of the converting unit.

Claims

1. A display apparatus, comprising:

an application specific integrated circuit (ASIC) having,

(a) an integrated circuit, and

(b) a converting unit that converts an output signal from the integrated circuit to a plurality of multi-level signals by controlling a current flow, wherein the integrated circuit and the converting unit are disposed in the ASIC; and

a display unit that displays respective output values of the ASIC based on the plurality of multi-level signals, and

a logic circuit that logically processes the output signal of the integrated circuit; and

a plurality of converters each respectively coupled in parallel to the logic circuit, wherein each ofthe plurality of converters receive the output signal and a corresponding enable signal from the integrated circuit and outputs one of (a) the output signal of the integrated circuit and (b) a fraction of the output signal.

2. The apparatus of claim 1, wherein said each of the plurality of converters comprises:

a buffer coupled parallel to the logic circuit;

a first resistance coupled parallel to the buffer; and

a second resistance coupled between an output terminal of the buffer and an output terminal of the logic circuit.

3. The apparatus of claims 2, wherein when the buffer is disabled the current flow relative to the first and second resistances is in one of a first direction and a second direction opposite the first direction.

4. The apparatus of claim 2, wherein the first and second resistances are first and second resistors, wherein the first resistor is larger than the second resistor, and wherein the multilevel signals are four-level signals.

5. The apparatus of claim 2, wherein the first and second resistances are equal and the multi-level signals are three-level signals.

6. The apparatus of claim 1, wherein the logic circuit is an inverter.

7. The apparatus of claim 1, wherein the display unit is one of a seven-segment display and a LCD.

8. The apparatus of claim 1, wherein said each of the plurality of converters determine respective levels of a corresponding one of the plurality of multi-level signals.

9. The apparatus of claim 1, wherein the output signal of the application specific integrated circuit and the enable signals are two-level signals.

10. An application specific integrated circuit (ASIC), comprising:

an integrated circuit formed in a first semiconductor chip that performs a prescribed function; and

a converting unit that receives a first signal and a plurality of enable signals outputted from the integrated circuit, wherein the converting unit converts the first signal to a plurality of multi-level signals by controlling a current flow, wherein the converting unit comprises,

a logic circuit that logically processes the first signal of the integrated circuit; and

a plurality of converters each respectively coupled in parallel to the logic circuit, wherein each of the plurality of converters receive the first signal and a corresponding enable signal from the integrated circuit and outputs one of (a) the first signal of the integrated circuit and (b) a fraction of the first signal.

11. The ASIC of claim 10, wherein

an inverter that inverts the first signal is the logic circuit, and the first signal is an output signal.

12. The ASIC of claim 10, wherein each of the plurality of converters respectively comprises:

a buffer coupled in parallel to the logic circuit;

a first resistor coupled in parallel to the buffer; and

a second resistor coupled between an output terminal of the buffer and an output terminal of the logic circuit.

13. The apparatus of claim 12, wherein when the buffer is disabled the current flow relative to the first and second resistances is in one of a first direction and a second direction opposite the first direction.

14. A display driving apparatus for an application specific integrated circuit, comprising:

a first signal and a plurality of enable signals output by the application specific integrated circuit; and

a converting unit that converts the first signal to a plurality of multi-level signals by controlling a current flow, wherein the converting unit comprises,

a logic-gate that logically processes the first signal, and

a plurality of converters respectively coupled in parallel to the logic-gate to form a plurality of current paths, wherein each of the plurality of converters receive the first signal, and wherein current flow in a selected current path is reversible based on the first signal of the application specific integrated circuit, and wherein each of the plurality of converters receive a corresponding one of the plurality of enable signals and determine respective levels of a corresponding one of the plurality of multi-level signals based on one of the enable signals and the first signal of the integrated circuit.

15. The display driving apparatus of claim 14, wherein the selected current path is enabled based on the corresponding one of the enable signals.

16. The display driving apparatus of claim 15, wherein the selected one of the converters converts the first signal to a four-level signal.

17. The display driving apparatus of claim 16, wherein current flow determines two of the plurality of levels in the multilevel output signal.

18. The display driving apparatus of claims 14, wherein each of the plurality of converters comprises:

a buffer coupled in parallel to the logic-gate;

a first resistor coupled in parallel to the buffer; and

a second resistor coupled between an output terminal of the buffer and an output terminal of the logic-gate.